JPS61157363U - - Google Patents
Info
- Publication number
- JPS61157363U JPS61157363U JP3992185U JP3992185U JPS61157363U JP S61157363 U JPS61157363 U JP S61157363U JP 3992185 U JP3992185 U JP 3992185U JP 3992185 U JP3992185 U JP 3992185U JP S61157363 U JPS61157363 U JP S61157363U
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- circuit board
- substrate
- integrated circuit
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000012528 membrane Substances 0.000 description 1
Description
第１図及び第２図はこの考案の一実施例の混成
厚膜回路基板の要部平面図及び要部断面図、第３
図はこの考案の他の実施例を示す要部斜視図、第
４図及び第５図は従来の混成厚膜回路基板の要部
斜視図及び要部断面図並びに第６図は従来の混成
厚膜集積回路の基板における他のパツドに電子部
品を搭載した状態を示す要部斜視図である。
１：基板、２：導体、３：パツド、４：半田ペ
ースト、５，５―１：電子部品、６：電子部品５
の電極、６―１：リード、７：半田ボール、８，
８―１：孔、９：電子部品が搭載されるべき部位
。
1 and 2 are a plan view and a sectional view of the main parts of a hybrid thick film circuit board according to an embodiment of this invention, and FIG.
4 and 5 are perspective views and sectional views of essential parts of a conventional hybrid thick film circuit board, and FIG. 6 is a perspective view of a conventional hybrid thick film circuit board. FIG. 3 is a perspective view of a main part showing a state in which electronic components are mounted on other pads on a substrate of a membrane integrated circuit. 1: Board, 2: Conductor, 3: Pad, 4: Solder paste, 5, 5-1: Electronic component, 6: Electronic component 5
electrode, 6-1: lead, 7: solder ball, 8,
8-1: Hole, 9: Portion where electronic components are to be mounted.
Claims (1)
部品の電極に対応して形成されるパツドを具備し
た混成厚膜集積回路基板構造において、前記基板
の前記パツド間の部位に孔を形設したことを特徴
とする混成厚膜集積回路基板構造。 In a hybrid thick film integrated circuit board structure comprising a conductor formed as a thick film on a substrate and having pads formed to correspond to electrodes of an electronic component, holes are formed in areas between the pads of the substrate. A hybrid thick film integrated circuit board structure characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3992185U JPS61157363U (en) | 1985-03-22 | 1985-03-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3992185U JPS61157363U (en) | 1985-03-22 | 1985-03-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61157363U true JPS61157363U (en) | 1986-09-30 |
Family
ID=30548322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3992185U Pending JPS61157363U (en) | 1985-03-22 | 1985-03-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61157363U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015151433A1 (en) * | 2014-04-01 | 2015-10-08 | パナソニックＩｐマネジメント株式会社 | Component mounting board |
-
1985
- 1985-03-22 JP JP3992185U patent/JPS61157363U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015151433A1 (en) * | 2014-04-01 | 2015-10-08 | パナソニックＩｐマネジメント株式会社 | Component mounting board |