JPS61157339U - - Google Patents
Info
- Publication number
- JPS61157339U JPS61157339U JP4116385U JP4116385U JPS61157339U JP S61157339 U JPS61157339 U JP S61157339U JP 4116385 U JP4116385 U JP 4116385U JP 4116385 U JP4116385 U JP 4116385U JP S61157339 U JPS61157339 U JP S61157339U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- clip
- hybrid integrated
- integrated circuit
- ceramic package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims 5
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図はこの考案の一実施例を示す斜視図、第
２図は第１図に示すものの断面図、第３図は従来
装置の一例を示す斜視図、第４図は第３図に示す
ものの断面図である。
図において１はパツケージ、２は外部接続用リ
ード、３は基板、４は回路パターン、５は内部接
続端子、６はパターン電極、７は接着剤、８はワ
イヤ、９はクリツプ付リードである。なお、各図
中同一符号は同一または相当部分を示す。
Fig. 1 is a perspective view showing an embodiment of this invention, Fig. 2 is a sectional view of the device shown in Fig. 1, Fig. 3 is a perspective view showing an example of a conventional device, and Fig. 4 is shown in Fig. 3. FIG. In the figure, 1 is a package, 2 is an external connection lead, 3 is a substrate, 4 is a circuit pattern, 5 is an internal connection terminal, 6 is a pattern electrode, 7 is an adhesive, 8 is a wire, and 9 is a lead with a clip. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
部接続用リードと接続されている内部接続端子を
有する混成集積回路用セラミツクパツケージと、
この混成集積回路用セラミツクパツケージに接着
して収納され、一方の面に回路パターン及び前記
パツケージの内部接続端子と対応する位置にパタ
ーン電極を有する混成集積回路基板と、前記基板
の前記一方の面と他方の面とを挾んで取り付けら
れる構造のクリツプを片側に有するクリツプ付リ
ードとで構成され、前記基板のパターン電極部に
前記クリツプ付リードのクリツプ部を取付けて半
田付し、このクリツプ付リードの取付けられた混
成集積回路基板を前記セラミツクパツケージ内に
接着して収納し、前記クリツプ付リードのリード
部を前記セラミツクパツケージの内側の内部接続
端子に半田付して、前記混成集積回路基板と前記
混成集積回路用セラミツクパツケージとを接続し
てあることを特徴とする混成集積回路装置。 A ceramic package for a hybrid integrated circuit having an external connection lead on the outside and an internal connection terminal connected to the external connection lead on the inside;
A hybrid integrated circuit board that is adhered and housed in this ceramic package for hybrid integrated circuits and has a circuit pattern on one side and pattern electrodes at positions corresponding to the internal connection terminals of the package; It consists of a lead with a clip, which has a clip on one side that can be attached to the other surface, and the clip part of the lead with clip is attached and soldered to the pattern electrode part of the board, and the lead with clip is attached. The mounted hybrid integrated circuit board is glued and housed in the ceramic package, and the lead portion of the lead with clip is soldered to the internal connection terminal inside the ceramic package to connect the hybrid integrated circuit board and the hybrid integrated circuit board. A hybrid integrated circuit device characterized in that it is connected to a ceramic package for integrated circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4116385U JPS61157339U (en) | 1985-03-22 | 1985-03-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4116385U JPS61157339U (en) | 1985-03-22 | 1985-03-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61157339U true JPS61157339U (en) | 1986-09-30 |
Family
ID=30550729
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4116385U Pending JPS61157339U (en) | 1985-03-22 | 1985-03-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61157339U (en) |
-
1985
- 1985-03-22 JP JP4116385U patent/JPS61157339U/ja active Pending
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