JPH0217854U - - Google Patents

Info

Publication number
JPH0217854U
JPH0217854U JP9534488U JP9534488U JPH0217854U JP H0217854 U JPH0217854 U JP H0217854U JP 9534488 U JP9534488 U JP 9534488U JP 9534488 U JP9534488 U JP 9534488U JP H0217854 U JPH0217854 U JP H0217854U
Authority
JP
Japan
Prior art keywords
semiconductor device
soldering
circuit board
printed circuit
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9534488U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9534488U priority Critical patent/JPH0217854U/ja
Publication of JPH0217854U publication Critical patent/JPH0217854U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の斜視図、第2図は
該一実施例の外部リードの拡大図、第3図は該一
実施例の外部リードがプリント基板にはんだ付け
された状態を示す断面図、第4図は本考案の他の
実施例の外部リードの拡大図、第5図は該他の実
施例の外部リードがプリント基板にはんだ付けさ
れた状態を示す断面図である。 1……パツケージ、2,7……外部リード、3
,8……はんだ付け面、4……穴、5,11……
プリント基板、6,10……はんだ、9……溝。
Fig. 1 is a perspective view of an embodiment of the present invention, Fig. 2 is an enlarged view of the external leads of the embodiment, and Fig. 3 shows the external leads of the embodiment soldered to a printed circuit board. FIG. 4 is an enlarged view of an external lead according to another embodiment of the present invention, and FIG. 5 is a sectional view showing the external lead of the other embodiment soldered to a printed circuit board. 1...Package, 2, 7...External lead, 3
, 8... Soldering surface, 4... Hole, 5, 11...
Printed circuit board, 6, 10...solder, 9...groove.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント基板へのはんだ付け実装を行なう為の
外部リードを有する半導体装置において、外部リ
ードのはんだ付け面に穴又は溝を有することを特
徴とする半導体装置。
1. A semiconductor device having external leads for mounting on a printed circuit board by soldering, the semiconductor device having a hole or groove on the soldering surface of the external lead.
JP9534488U 1988-07-18 1988-07-18 Pending JPH0217854U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9534488U JPH0217854U (en) 1988-07-18 1988-07-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9534488U JPH0217854U (en) 1988-07-18 1988-07-18

Publications (1)

Publication Number Publication Date
JPH0217854U true JPH0217854U (en) 1990-02-06

Family

ID=31320009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9534488U Pending JPH0217854U (en) 1988-07-18 1988-07-18

Country Status (1)

Country Link
JP (1) JPH0217854U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009124095A (en) * 2007-11-12 2009-06-04 Samsung Sdi Co Ltd Semiconductor package and mounting method thereof
JP2017041541A (en) * 2015-08-20 2017-02-23 三菱電機株式会社 High-frequency high-output device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009124095A (en) * 2007-11-12 2009-06-04 Samsung Sdi Co Ltd Semiconductor package and mounting method thereof
US8319319B2 (en) 2007-11-12 2012-11-27 Samsung Sdi Co., Ltd. Semiconductor package and mounting method thereof
JP2017041541A (en) * 2015-08-20 2017-02-23 三菱電機株式会社 High-frequency high-output device

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