JPS60117644A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS60117644A
JPS60117644A JP58224335A JP22433583A JPS60117644A JP S60117644 A JPS60117644 A JP S60117644A JP 58224335 A JP58224335 A JP 58224335A JP 22433583 A JP22433583 A JP 22433583A JP S60117644 A JPS60117644 A JP S60117644A
Authority
JP
Japan
Prior art keywords
main body
cap
glass layer
ceramic
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58224335A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0126538B2 (US07922777-20110412-C00004.png
Inventor
Susumu Kida
貴田 進
Isato Usami
宇佐美 勇人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58224335A priority Critical patent/JPS60117644A/ja
Publication of JPS60117644A publication Critical patent/JPS60117644A/ja
Publication of JPH0126538B2 publication Critical patent/JPH0126538B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP58224335A 1983-11-30 1983-11-30 半導体装置の製造方法 Granted JPS60117644A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58224335A JPS60117644A (ja) 1983-11-30 1983-11-30 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58224335A JPS60117644A (ja) 1983-11-30 1983-11-30 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60117644A true JPS60117644A (ja) 1985-06-25
JPH0126538B2 JPH0126538B2 (US07922777-20110412-C00004.png) 1989-05-24

Family

ID=16812141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58224335A Granted JPS60117644A (ja) 1983-11-30 1983-11-30 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60117644A (US07922777-20110412-C00004.png)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625647A (ja) * 1985-07-02 1987-01-12 Fujitsu Ltd 半導体装置の製造方法
EP0347991A2 (en) * 1988-06-22 1989-12-27 Koninklijke Philips Electronics N.V. Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages
US5059558A (en) * 1988-06-22 1991-10-22 North American Philips Corp., Signetics Division Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339859A (en) * 1976-09-24 1978-04-12 Hitachi Ltd Package
JPS5339857A (en) * 1976-09-22 1978-04-12 Siemens Ag Method of making injected domin in substrate
JPS5434765A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Manufacture of glass-sealed package

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339857A (en) * 1976-09-22 1978-04-12 Siemens Ag Method of making injected domin in substrate
JPS5339859A (en) * 1976-09-24 1978-04-12 Hitachi Ltd Package
JPS5434765A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Manufacture of glass-sealed package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625647A (ja) * 1985-07-02 1987-01-12 Fujitsu Ltd 半導体装置の製造方法
EP0347991A2 (en) * 1988-06-22 1989-12-27 Koninklijke Philips Electronics N.V. Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages
US5059558A (en) * 1988-06-22 1991-10-22 North American Philips Corp., Signetics Division Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages

Also Published As

Publication number Publication date
JPH0126538B2 (US07922777-20110412-C00004.png) 1989-05-24

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