JPS60109331U - 樹脂封止半導体装置 - Google Patents

樹脂封止半導体装置

Info

Publication number
JPS60109331U
JPS60109331U JP1983203619U JP20361983U JPS60109331U JP S60109331 U JPS60109331 U JP S60109331U JP 1983203619 U JP1983203619 U JP 1983203619U JP 20361983 U JP20361983 U JP 20361983U JP S60109331 U JPS60109331 U JP S60109331U
Authority
JP
Japan
Prior art keywords
resin
sealed
heat dissipation
semiconductor device
folds
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983203619U
Other languages
English (en)
Inventor
大前　誠蔵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1983203619U priority Critical patent/JPS60109331U/ja
Publication of JPS60109331U publication Critical patent/JPS60109331U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図及び第２図は従来の半導体装置を示し、第１図は
樹脂封止前の斜視図、第２図は第１図の状態から半導体
素子部を封止した樹脂封止半導体装置の斜視図、第３図
及び第４図はこの考案の一実施例による半導体装置を示
し、第３図は樹脂封止前の斜視図、第４図は第３図の状
態から半導体素子部を封止した樹脂封止半導体装置の斜
視図、第５図及び第６図はこの考案の他のそれぞれ異な
る実施例を示す樹脂封止体から露出した放熱板部の斜視
図である。　　　　　　□ １・・・リードフレーム、２・・・放熱板部、３・・・
外部リード、６・・・半導体素子、８・・・樹脂封止体
、１１・・・リードフレーム、１２・・・放熱板部、１
３・・・放熱ひだ、１４・・・リードフレーム、１５・
・・放熱板部、１６・・・放熱ひだ、１７・・・放熱フ
ィン。なお、図中　　　　。 同一符号は同−又は相当部分を示す。

Claims (4)

    【実用新案登録請求の範囲】
  1. （１）放熱板部上に半導体素子が装着され、複数の外部
    リードが出されたリードフレーム、及び上記半導体素子
    部を封止し、上記外部リードが引出され、上記放熱板部
    の後半分を露出させた樹脂封止体を備え、この放熱板部
    の後半部には複数の放熱ひだを設けたことを特徴とする
    樹脂封止半導体装置。
  2. （２）放熱板部の放熱ひだは一体に形成されたフィンか
    らなる実用新案登録請求の範囲第１項記載の樹脂封止半
    導体装置。
  3. （３）　　放熱板部の放熱ひだは表面に固着したフィン
    からなる実用新案登録請求の範囲第１項記載の樹脂封止
    品導体装置。
  4. （４）放熱板部の放熱ひだは波形に折曲げ形成されてな
    る実用新案登録請求の範囲第１項記載の樹脂封止半導体
    装置。
JP1983203619U 1983-12-26 1983-12-26 樹脂封止半導体装置 Pending JPS60109331U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983203619U JPS60109331U (ja) 1983-12-26 1983-12-26 樹脂封止半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983203619U JPS60109331U (ja) 1983-12-26 1983-12-26 樹脂封止半導体装置

Publications (1)

Publication Number Publication Date
JPS60109331U true JPS60109331U (ja) 1985-07-25

Family

ID=30766025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983203619U Pending JPS60109331U (ja) 1983-12-26 1983-12-26 樹脂封止半導体装置

Country Status (1)

Country Link
JP (1) JPS60109331U (ja)

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