JPS59112951U - 絶縁物封止半導体装置 - Google Patents

絶縁物封止半導体装置

Info

Publication number
JPS59112951U
JPS59112951U JP1983006658U JP665883U JPS59112951U JP S59112951 U JPS59112951 U JP S59112951U JP 1983006658 U JP1983006658 U JP 1983006658U JP 665883 U JP665883 U JP 665883U JP S59112951 U JPS59112951 U JP S59112951U
Authority
JP
Japan
Prior art keywords
insulator
semiconductor device
heat sink
recess
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1983006658U
Other languages
English (en)
Other versions
JPS6336689Y2 (ja
Inventor
都外川 峯秀
Original Assignee
サンケン電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by サンケン電気株式会社 filed Critical サンケン電気株式会社
Priority to JP1983006658U priority Critical patent/JPS59112951U/ja
Publication of JPS59112951U publication Critical patent/JPS59112951U/ja
Application granted granted Critical
Publication of JPS6336689Y2 publication Critical patent/JPS6336689Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図〜第4図は従来の絶縁物封止半導体装置を示す。 第5図〜第8図は本考案に係る絶縁物封止半導体装置を
示す。第1図、第3図、第5図および第7図は平面図で
、第2図、第4図、第6図および第8図はそれぞれのA
−A線断面図である。 1はパワートランジスタチップ(半導体素子)、2は放
熱板、2aは放熱板の肉厚部、2bは放熱板の肉薄部、
3. 4. 5はリード、6,7は内部リード線、8は
放熱板に設けられた孔、9,10は連結部、11は取付
は孔、12は樹脂体(絶縁物)、12aは孔8の周囲に
形成された樹脂体、13は放熱板に設けられた凹部。

Claims (3)

    【実用新案登録請求の範囲】
  1. (1)半導体素子1が放熱板2の一方の主面に固着され
    、この半導体素子1は絶縁物12によって封止され、前
    記放熱板2には凹部13が形成され、この凹部13にお
    いて前記絶縁物12の一部によって取付は孔11がその
    内周に前記放熱板2が露出しないように形成されている
    ことを特徴とする絶縁物封止半導体装置。
  2. (2)前記放熱板2が肉厚部2aと肉薄部2bに2分さ
    れており、この肉厚部2aに前記半導体素子1が固着さ
    れており、この肉薄部2bに前記凹部13が形成されて
    いる実用新案登録請求の範囲第1項記載の絶縁物封止半
    導体装置。
  3. (3)前記取付は孔11の孔の方向に見たとき、前記取
    付は孔11が前記凹部13に完全に収容される形になっ
    ている実用新案登録請求の範囲第1項または第2項記載
    の絶縁物封止半導体装置。
JP1983006658U 1983-01-20 1983-01-20 絶縁物封止半導体装置 Granted JPS59112951U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983006658U JPS59112951U (ja) 1983-01-20 1983-01-20 絶縁物封止半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983006658U JPS59112951U (ja) 1983-01-20 1983-01-20 絶縁物封止半導体装置

Publications (2)

Publication Number Publication Date
JPS59112951U true JPS59112951U (ja) 1984-07-30
JPS6336689Y2 JPS6336689Y2 (ja) 1988-09-28

Family

ID=30138205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983006658U Granted JPS59112951U (ja) 1983-01-20 1983-01-20 絶縁物封止半導体装置

Country Status (1)

Country Link
JP (1) JPS59112951U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6291443U (ja) * 1985-11-29 1987-06-11
JPH0349253A (ja) * 1989-07-18 1991-03-04 Fuji Electric Co Ltd 樹脂封止型半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5732658A (en) * 1980-08-05 1982-02-22 Nec Corp Resin sealing type semiconductor device with radiator plate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5732658A (en) * 1980-08-05 1982-02-22 Nec Corp Resin sealing type semiconductor device with radiator plate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6291443U (ja) * 1985-11-29 1987-06-11
JPH0349253A (ja) * 1989-07-18 1991-03-04 Fuji Electric Co Ltd 樹脂封止型半導体装置

Also Published As

Publication number Publication date
JPS6336689Y2 (ja) 1988-09-28

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