JPS5951544A - 誘電体分離半導体集積回路装置の製造方法 - Google Patents
誘電体分離半導体集積回路装置の製造方法Info
- Publication number
- JPS5951544A JPS5951544A JP16273082A JP16273082A JPS5951544A JP S5951544 A JPS5951544 A JP S5951544A JP 16273082 A JP16273082 A JP 16273082A JP 16273082 A JP16273082 A JP 16273082A JP S5951544 A JPS5951544 A JP S5951544A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon nitride
- silicon
- dielectric material
- nitride film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 239000003989 dielectric material Substances 0.000 title abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 38
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 19
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 19
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 17
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 abstract description 6
- 238000002161 passivation Methods 0.000 abstract description 4
- 239000000126 substance Substances 0.000 abstract description 4
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 3
- 238000012805 post-processing Methods 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16273082A JPS5951544A (ja) | 1982-09-17 | 1982-09-17 | 誘電体分離半導体集積回路装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16273082A JPS5951544A (ja) | 1982-09-17 | 1982-09-17 | 誘電体分離半導体集積回路装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5951544A true JPS5951544A (ja) | 1984-03-26 |
JPS6317334B2 JPS6317334B2 (enrdf_load_stackoverflow) | 1988-04-13 |
Family
ID=15760174
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16273082A Granted JPS5951544A (ja) | 1982-09-17 | 1982-09-17 | 誘電体分離半導体集積回路装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5951544A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60177644A (ja) * | 1984-02-23 | 1985-09-11 | Matsushita Electric Works Ltd | 高耐圧半導体装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS568842A (en) * | 1979-07-04 | 1981-01-29 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor integrated circuit device |
-
1982
- 1982-09-17 JP JP16273082A patent/JPS5951544A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS568842A (en) * | 1979-07-04 | 1981-01-29 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor integrated circuit device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60177644A (ja) * | 1984-02-23 | 1985-09-11 | Matsushita Electric Works Ltd | 高耐圧半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JPS6317334B2 (enrdf_load_stackoverflow) | 1988-04-13 |
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