JPS568842A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS568842A JPS568842A JP8396779A JP8396779A JPS568842A JP S568842 A JPS568842 A JP S568842A JP 8396779 A JP8396779 A JP 8396779A JP 8396779 A JP8396779 A JP 8396779A JP S568842 A JPS568842 A JP S568842A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- slots
- region
- island
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
Abstract
PURPOSE:To obtain a separated dielectric substrate having a high withstand voltage by a simple process when a semiconductor substrate is to be made in an island shape by V-shaped separating slots by a method wherein a lamination structure consisted of a high impurity concentraton region and an insulating oxide film are prepared under the base of island region. CONSTITUTION:An n-type Si substrate 31 is covered with an SiO2 film 32 and is etched using an anisotropic etching liquid, and V-shaped separating slots 33 are formed to produces an island region in the substrate 31. An n-type impurity is made to diffuses into the whole face containing the slots 33 to form an n<+>-type region 34 constituting a channel stopper in the surface layer of substrate 31 under the film 32, and the whole face is covered with an insulating SiO2 film 32. Then a polycrystalline Si layer 35 is piled up having the thickness deeper than the slots 33 being able to withstand handing, the back face of substrate 31 is burnished to expose the apex of slots 33 and the region of substrate surrounded with slots 33 is made to be a complete island-shape. After the disposition mentioned above, each function element 38, Al wirings 39, etc., are prepared in a single crystalline island 36 by an ordinary method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8396779A JPS568842A (en) | 1979-07-04 | 1979-07-04 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8396779A JPS568842A (en) | 1979-07-04 | 1979-07-04 | Semiconductor integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS568842A true JPS568842A (en) | 1981-01-29 |
JPS6352464B2 JPS6352464B2 (en) | 1988-10-19 |
Family
ID=13817310
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8396779A Granted JPS568842A (en) | 1979-07-04 | 1979-07-04 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS568842A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5951544A (en) * | 1982-09-17 | 1984-03-26 | Jido Keisoku Gijutsu Kenkiyuukumiai | Manufacture of isolated dielectric material semiconductor integrated circuit device |
JPS6062156A (en) * | 1983-09-16 | 1985-04-10 | Nippon Telegr & Teleph Corp <Ntt> | High withstand voltage semiconductor device |
JPS61115346A (en) * | 1984-11-12 | 1986-06-02 | Nec Corp | Integrated capacitor structure |
JPS61287169A (en) * | 1985-06-13 | 1986-12-17 | Oki Electric Ind Co Ltd | High withstand voltage bipolar type semiconductor integrated device and manufacture thereof |
US5494982A (en) * | 1989-05-19 | 1996-02-27 | Idemitsu Petrochemical Company, Limited | Process for preparing ethylenic polymer composition |
US5583072A (en) * | 1995-06-30 | 1996-12-10 | Siemens Components, Inc. | Method of manufacturing a monolithic linear optocoupler |
US5903016A (en) * | 1995-06-30 | 1999-05-11 | Siemens Components, Inc. | Monolithic linear optocoupler |
-
1979
- 1979-07-04 JP JP8396779A patent/JPS568842A/en active Granted
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5951544A (en) * | 1982-09-17 | 1984-03-26 | Jido Keisoku Gijutsu Kenkiyuukumiai | Manufacture of isolated dielectric material semiconductor integrated circuit device |
JPS6317334B2 (en) * | 1982-09-17 | 1988-04-13 | Jido Keisoku Gijutsu Kenkyukumiai | |
JPS6062156A (en) * | 1983-09-16 | 1985-04-10 | Nippon Telegr & Teleph Corp <Ntt> | High withstand voltage semiconductor device |
JPS61115346A (en) * | 1984-11-12 | 1986-06-02 | Nec Corp | Integrated capacitor structure |
JPS61287169A (en) * | 1985-06-13 | 1986-12-17 | Oki Electric Ind Co Ltd | High withstand voltage bipolar type semiconductor integrated device and manufacture thereof |
US5494982A (en) * | 1989-05-19 | 1996-02-27 | Idemitsu Petrochemical Company, Limited | Process for preparing ethylenic polymer composition |
US5583072A (en) * | 1995-06-30 | 1996-12-10 | Siemens Components, Inc. | Method of manufacturing a monolithic linear optocoupler |
US5903016A (en) * | 1995-06-30 | 1999-05-11 | Siemens Components, Inc. | Monolithic linear optocoupler |
Also Published As
Publication number | Publication date |
---|---|
JPS6352464B2 (en) | 1988-10-19 |
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