JPS56158444A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce the area of isolation regions of the semiconductor integrated circuit by a method wherein insulating films are provided on the prescribed regions of a P type substrate, epitaxial layers are accumulated thereon and polycrystalline Si layers are formed selectively, and etching is performed. CONSTITUTION:BSG layers 21, SiO2 films 22 and polycrystalline Si layers 23 are accumulated on a P type Si substrate 20, and photo etching is performed thereon. Then epitaxial layers 24 are accumulated, polycrystalline Si layers 25 are formed thereon interposing the polycrystalline Si layers 23 between them, and the surface becomes flat. When a photo resist layer 26 is applied spinning the substrate, the top parts of the layers 25 form thin films. After the resist thin films on the layers 25 are removed by etching the resist layers 26 in O2 plasma, and when the polycrystalline Si layers 25, 23 are removed by CF4 plasma, the side faces (d) of the island of the epitaxial layer 24 are surrounded with field oxide films 22. Then a gate oxide film 27, a polycrustalline Si gate electrode 28, a source 29 and a drain 29' are formed. At this time, P<+> type channel stoppers 30 are formed making the BSG layers 21 as diffusion sources. By this constitution, because the area of the isolation regions is small and the surfaces thereof are flat, density of integration can be enlarged, and withstand voltage between the drain and the substrate can be enhanced.