JPS55105332A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS55105332A JPS55105332A JP1294879A JP1294879A JPS55105332A JP S55105332 A JPS55105332 A JP S55105332A JP 1294879 A JP1294879 A JP 1294879A JP 1294879 A JP1294879 A JP 1294879A JP S55105332 A JPS55105332 A JP S55105332A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- region
- substrate
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Weting (AREA)
Abstract
PURPOSE: To make the opening area accurate and to obtain high density in forming an opening hole in an Si3N4 layer on a semiconductor layer by introducing P impurities in the layer on which opening hole is formed and making the layer to become PSG, thereafter removing it by using acidic solution.
CONSTITUTION: A thick field oxide film 34 is formed on the peripheral portion of a p-type Si substrate 31 via a p-type channel stopper region 32; a thin gate oxide film 30 is deposited on the substrate 31 surrounded by a film 34; and an n-type polycrystal lene layer 35, an Si3N4 layer 36, and an Si2O3 layer 37 are laminated and grown on the plane including the portions mentioned above. Then, etching is made, layers 47, 46, and 45 are remained only on the gate region, and an n-type source and drain region 43 is diffused and formed in the substrate 41 on both sides of the mask which is the layers 47, 46 and 45. Thereafter, a region 53 is covered by an SiO2 layer 54, a photoresist-pattern 58 is provided, P impurities are diffused, an Si3N4 film 66 is completely made to be PSG, planson washing is performed, the film 66 is removed and only a gate electrode 57 is remained.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1294879A JPS55105332A (en) | 1979-02-07 | 1979-02-07 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1294879A JPS55105332A (en) | 1979-02-07 | 1979-02-07 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55105332A true JPS55105332A (en) | 1980-08-12 |
Family
ID=11819495
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1294879A Pending JPS55105332A (en) | 1979-02-07 | 1979-02-07 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55105332A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4948757A (en) * | 1987-04-13 | 1990-08-14 | General Motors Corporation | Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures |
US5780313A (en) * | 1985-02-14 | 1998-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
US6177302B1 (en) | 1990-11-09 | 2001-01-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a thin film transistor using multiple sputtering chambers |
-
1979
- 1979-02-07 JP JP1294879A patent/JPS55105332A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5780313A (en) * | 1985-02-14 | 1998-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
US5976259A (en) * | 1985-02-14 | 1999-11-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, manufacturing method, and system |
US6113701A (en) * | 1985-02-14 | 2000-09-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, manufacturing method, and system |
US4948757A (en) * | 1987-04-13 | 1990-08-14 | General Motors Corporation | Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures |
US6261877B1 (en) | 1990-09-11 | 2001-07-17 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing gate insulated field effect transistors |
US6177302B1 (en) | 1990-11-09 | 2001-01-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a thin film transistor using multiple sputtering chambers |
US6566175B2 (en) | 1990-11-09 | 2003-05-20 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing gate insulated field effect transistors |
US7507615B2 (en) | 1990-11-09 | 2009-03-24 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing gate insulated field effect transistors |
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