JPS59181627A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59181627A
JPS59181627A JP58055984A JP5598483A JPS59181627A JP S59181627 A JPS59181627 A JP S59181627A JP 58055984 A JP58055984 A JP 58055984A JP 5598483 A JP5598483 A JP 5598483A JP S59181627 A JPS59181627 A JP S59181627A
Authority
JP
Japan
Prior art keywords
temperature
silicone gel
gel layer
resin
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58055984A
Other languages
English (en)
Japanese (ja)
Other versions
JPS646538B2 (enrdf_load_stackoverflow
Inventor
Keizo Tani
谷 敬造
Masahiro Ogasawara
正博 小笠原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58055984A priority Critical patent/JPS59181627A/ja
Priority to US06/592,596 priority patent/US4558510A/en
Publication of JPS59181627A publication Critical patent/JPS59181627A/ja
Publication of JPS646538B2 publication Critical patent/JPS646538B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/005Constructional details common to different types of electric apparatus arrangements of circuit components without supporting structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP58055984A 1983-03-31 1983-03-31 半導体装置の製造方法 Granted JPS59181627A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58055984A JPS59181627A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法
US06/592,596 US4558510A (en) 1983-03-31 1984-03-23 Method of producing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58055984A JPS59181627A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59181627A true JPS59181627A (ja) 1984-10-16
JPS646538B2 JPS646538B2 (enrdf_load_stackoverflow) 1989-02-03

Family

ID=13014343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58055984A Granted JPS59181627A (ja) 1983-03-31 1983-03-31 半導体装置の製造方法

Country Status (2)

Country Link
US (1) US4558510A (enrdf_load_stackoverflow)
JP (1) JPS59181627A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3616226A1 (de) * 1985-05-15 1986-11-20 Mitsubishi Denki K.K., Tokio/Tokyo Halbleitereinrichtung
JPH03225943A (ja) * 1990-01-31 1991-10-04 Nippondenso Co Ltd 混成集積回路装置

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4769744A (en) * 1983-08-04 1988-09-06 General Electric Company Semiconductor chip packages having solder layers of enhanced durability
JPS60239051A (ja) * 1984-05-11 1985-11-27 Mitsubishi Electric Corp 半導体装置
DE3521572A1 (de) * 1985-06-15 1986-12-18 Brown, Boveri & Cie Ag, 6800 Mannheim Leistungshalbleitermodul mit keramiksubstrat
JPH07120733B2 (ja) * 1985-09-27 1995-12-20 日本電装株式会社 車両用半導体素子パッケージ構造とその製造方法
AU8034087A (en) * 1987-02-20 1988-09-14 Lsi Logic Corporation Integrated circuit package assembly
IT1202657B (it) * 1987-03-09 1989-02-09 Sgs Microelettronica Spa Procedimento di fabbricazione di un dispositivo modulare di potenza a semiconduttore e dispositivo con esso ottenento
FR2614494B1 (fr) * 1987-04-22 1989-07-07 Power Compact Procede d'assemblage de circuits de puissance et de circuits de commande sur plusieurs niveaux sur un meme module et module ainsi obtenu
DE3717489A1 (de) * 1987-05-23 1988-12-01 Asea Brown Boveri Leistungshalbleitermodul und verfahren zur herstellung des moduls
US5026667A (en) * 1987-12-29 1991-06-25 Analog Devices, Incorporated Producing integrated circuit chips with reduced stress effects
US4903118A (en) * 1988-03-30 1990-02-20 Director General, Agency Of Industrial Science And Technology Semiconductor device including a resilient bonding resin
JPH0267731A (ja) * 1988-09-02 1990-03-07 Toshiba Corp はんだバンプ形半導体装置とその製造方法
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package
US5243217A (en) * 1990-11-03 1993-09-07 Fuji Electric Co., Ltd. Sealed semiconductor device with protruding portion
FR2678773B1 (fr) * 1991-07-05 1997-03-14 Thomson Csf Procede de cablage entre des sorties de boitier et des elements d'hybride.
IT1259370B (it) * 1992-03-27 1996-03-12 Marelli Autronica Unita' elettronica, particolarmente per il controllo di funzioni di un motore a combustione interna
EP0661748A1 (en) * 1993-12-28 1995-07-05 Hitachi, Ltd. Semiconductor device
FR2719157B1 (fr) * 1994-04-20 1996-08-09 Rv Electronique Dispositif de puissance à semiconducteur à double isolation.
DE4446527A1 (de) * 1994-12-24 1996-06-27 Ixys Semiconductor Gmbh Leistungshalbleitermodul
US5972738A (en) * 1997-05-07 1999-10-26 Lsi Logic Corporation PBGA stiffener package
US5837558A (en) * 1997-11-04 1998-11-17 Texas Instruments Incorporated Integrated circuit chip packaging method
JP3257500B2 (ja) * 1998-02-27 2002-02-18 ティーディーケイ株式会社 磁気ヘッド装置
US6404065B1 (en) * 1998-07-31 2002-06-11 I-Xys Corporation Electrically isolated power semiconductor package
JP4442833B2 (ja) * 1998-08-04 2010-03-31 キヤノン株式会社 光電変換装置
US6087200A (en) * 1998-08-13 2000-07-11 Clear Logic, Inc. Using microspheres as a stress buffer for integrated circuit prototypes
KR20010058771A (ko) * 1999-12-30 2001-07-06 구자홍 전기/전자 제품용 원 시스템 모듈
US6727585B2 (en) 2001-05-04 2004-04-27 Ixys Corporation Power device with a plastic molded package and direct bonded substrate
JP2008141122A (ja) * 2006-12-05 2008-06-19 Denso Corp 樹脂モールド電子部品及びその製造方法
US7851267B2 (en) * 2007-10-18 2010-12-14 Infineon Technologies Ag Power semiconductor module method
US7944033B2 (en) * 2007-10-18 2011-05-17 Infineon Technologies Ag Power semiconductor module
WO2009081723A1 (ja) 2007-12-20 2009-07-02 Fuji Electric Device Technology Co., Ltd. 半導体装置およびその製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3824328A (en) * 1972-10-24 1974-07-16 Texas Instruments Inc Encapsulated ptc heater packages
US3839660A (en) * 1973-02-05 1974-10-01 Gen Motors Corp Power semiconductor device package
JPS5435666B2 (enrdf_load_stackoverflow) * 1975-02-11 1979-11-05
US4163072A (en) * 1977-06-07 1979-07-31 Bell Telephone Laboratories, Incorporated Encapsulation of circuits
JPS5591150A (en) * 1978-12-28 1980-07-10 Hitachi Ltd Manufacture of resin-sealed semiconductor device
JPS58128755A (ja) * 1982-01-27 1983-08-01 Toshiba Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3616226A1 (de) * 1985-05-15 1986-11-20 Mitsubishi Denki K.K., Tokio/Tokyo Halbleitereinrichtung
JPH03225943A (ja) * 1990-01-31 1991-10-04 Nippondenso Co Ltd 混成集積回路装置

Also Published As

Publication number Publication date
US4558510A (en) 1985-12-17
JPS646538B2 (enrdf_load_stackoverflow) 1989-02-03

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