JPS59150460A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

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Publication number
JPS59150460A
JPS59150460A JP58013981A JP1398183A JPS59150460A JP S59150460 A JPS59150460 A JP S59150460A JP 58013981 A JP58013981 A JP 58013981A JP 1398183 A JP1398183 A JP 1398183A JP S59150460 A JPS59150460 A JP S59150460A
Authority
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Japan
Prior art keywords
bonding
semiconductor chip
wire
semiconductor device
bonding wire
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58013981A
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English (en)
Inventor
Masahide Kudo
工藤 眞秀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58013981A priority Critical patent/JPS59150460A/ja
Publication of JPS59150460A publication Critical patent/JPS59150460A/ja
Pending legal-status Critical Current

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    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
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    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体装置の製造方法に関し、特にワイヤデン
ディング部分の耐湿性を向上し得る製造方法に係る。
〔発明の技術的背景〕
ICあるいはLSI等の半導体装置を製造する場合、内
部回路が形成された半導体チップを外囲器にノJ?ツケ
ージングするため、次のような組立工程が行なわれる。
即ち、甘ず第1図に示すようにリードフレームのアイラ
ンド部1上に半導体チップ2をマウントし、更に半導体
チップ2に形成されているアルミニウム製のデンディン
グ・ぐラド4・・・とアイランド部1の周囲に配設され
たり−ド3・・・との間をAu、At等のボンディング
ワイヤ5を介して接続(ワイヤボンディング)する。続
いて、エポキシ樹脂等の熱硬(1樹脂のトランスファー
モールドを行ない、第2図に示すように所要部分をモー
ルド樹脂層6で樹脂封止する。
〔背景技術の問題点〕
ところで、上記のようにして製造された半導体装置では
、その後の4湿性試験においてデンディングワイヤ5と
ゾンデイングツぞラド4との接続部が下記のようにして
腐蝕し、このためボンディング不良が発生するといった
問題があった。
第3図は金製のボンディングワイヤ5とアルミニウム製
のビンディングパッド4との接続部を拡大して示す断面
図であり、図中7は半導体チップ2の表面を畳うPSG
(燐硅酸ガラス)笠のパッシベーション膜である。ボン
ディングワイヤ5は熱圧着によりゾンデイングツやラド
4上に接合されるため、その先端部がネイルヘッド状に
圧壊されている。そして、両者の接合部分にはAtとA
uの共晶層5′が形成され、該共晶層5′によって両者
の接合が達成されている1、この共晶層5′はAuAt
2 、 AuAt、 Au2At、 Au4At等から
なっている1、このように、デンディング部分ではがン
デイング/そラド4のAtや共晶層5′のAt成分が露
出している。このため1組立工程で混入するゴミやモー
ルド樹脂層6に含まれるCt−イオン、あるいは耐湿性
試験で外部から侵入するCt−イオン等のハロゲンイオ
ンがポンディング/やラド4や共晶層5′のAt成分に
作用して腐蝕を生じ、接続不良を生じるものである。
At製のボンディングワイヤ5を用いた場合にも同様の
腐蝕を生じ、これによって接続不良が発生ずるものであ
る。。
〔発明の目的〕
本発明は上記事情に鑑みて々でれたもので、ポンプイン
グツやラドとデンディングワイヤの接続部における腐蝕
を防止でき、もって1liii洋性を向上した信頼性の
高い半導体装し1を得ることができる製造方法を提供す
るものでを)る3゜〔発明の桐5袈〕 本発明による半導体装置の製造方法は、半導体チップを
リードフレーム上eこマウントし1、更にワイヤボンデ
ィング後行なった後、樹脂封止を行なう前に、前記半導
体チップとビンディングワイヤとの接続部表面をDう絶
縁膜な形成することを特徴とするものである。
本発明において、半導体テッグとボンディングワイヤと
の接合部表面を拶う絶り膜を形成する方法としては、ワ
イヤボンディング後に水蒸気処理を行々うことにより所
要表面に酸化膜を形成してもよく、1だポリイミドイ創
脂やエポキシ樹脂等の耐湿性樹脂をコーティングしても
よい。
上記本発明によれば、ボンディングワイヤと半導体チッ
プとの接合部分が絶縁膜で保護されるため、この部分で
アルミニウム成分がハロゲンイオン等の作用を受けて腐
蝕するのを防止できる。従って、耐湿性の高い半導体装
置を製造することができる。
〔発明の実施例〕
以下に本発明の一実施例を説明する。
まず、従来の製造方法と同様、第1図に示すように半導
体チツf2をリードフレームのアイランド部1上にマウ
ントし、ビンディングツやラド4とり−ド3との間を金
製のボンディングワイヤ4で接続する。続いて、この状
態で水蒸気処理を行ない、第4図に示すようにポンディ
ングパッド4およびデンディングワイヤ5の接合部表面
をIう酸化膜8を形成する。との場合、デンディングパ
ラ)44上に形成された酸化膜8れた酸化膜はその成分
の酸化物、即ちAuAt20X +AuAt0y、 A
t+4AtO2、Au4AtOkからなる。なお、Au
製のボンディングワイヤ5は水蒸気処理によつ−Cも酸
化されない。その後は従来の製造方法と同様に、樹脂モ
ールド層6で封止して半導体装置を得る。
上記実施例により製造された半導体装置では。
デンディングワイヤ゛5とぎンデイングパツド4との接
合部の表面が酸化膜8で被砕されているため、内部のA
l成分はCt−等のノ・ログンイオンによる腐蝕作用か
ら保静される。従って、耐湿性試験においても腐蝕によ
る接続不良の発性を防止するととができる。
〔発明の効果〕
以上詳述し/ζように、本発明によればビンディングパ
ッドとデンディングワイヤとの接続部における腐蝕を防
止し、もって耐湿性を向上した信頼性の高い半導体装置
を製造できるといった顕著な効果が得られるものである
第1図は半導体装置の製造工程におけるワイヤデンディ
ングを説明するだめの斜視図、第2図は樹脂封止された
半導体製値を示す断面図。
第3図はボンディングワイヤとポンディングパッドとの
接続部分を示す拡大断面図、第4図は本発明の一実施例
になる半導体1G−frの製造方法を説明するだめの第
3図同様の拡大断面1シ1である。
1・・・アイランド部、2・・・半導体チップ、3・・
・IJ−)”、4・・・ポンディングパッド、5・・ボ
ンディングワイヤ、6・・・イ克」旨モールドJM% 
7・−・ノぐツ7ぺ・−ジョン膜、8・・・酸化膜。
出願入代U+j人 弁理士 鈴 江 i(彦第4図

Claims (2)

    【特許請求の範囲】
  1. (1)半導体チップをリードフレーム上にマウントし、
    更にワイヤボンディングを行なった後、樹脂封止を行な
    う前に、前記半導体チップとデンディングワイヤとの接
    続部表面を紡う絶縁膜を形成することを特徴とする半導
    体装置の製造方法1、
  2. (2)水蒸気処理により前記絶縁膜を形成することを特
    徴とする特許請求の範囲第(1)項記載の半導体装置の
    製造方法。
JP58013981A 1983-01-31 1983-01-31 半導体装置の製造方法 Pending JPS59150460A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58013981A JPS59150460A (ja) 1983-01-31 1983-01-31 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58013981A JPS59150460A (ja) 1983-01-31 1983-01-31 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPS59150460A true JPS59150460A (ja) 1984-08-28

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63128634A (ja) * 1986-11-18 1988-06-01 Nec Corp 半導体装置の製造方法
US6383909B1 (en) 2000-05-16 2002-05-07 Nec Corporation Semiconductor device with a corrosion resistant bonding pad and manufacturing method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63128634A (ja) * 1986-11-18 1988-06-01 Nec Corp 半導体装置の製造方法
JPH0546978B2 (ja) * 1986-11-18 1993-07-15 Nippon Electric Co
US6383909B1 (en) 2000-05-16 2002-05-07 Nec Corporation Semiconductor device with a corrosion resistant bonding pad and manufacturing method therefor

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