JPS586143A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS586143A
JPS586143A JP56104159A JP10415981A JPS586143A JP S586143 A JPS586143 A JP S586143A JP 56104159 A JP56104159 A JP 56104159A JP 10415981 A JP10415981 A JP 10415981A JP S586143 A JPS586143 A JP S586143A
Authority
JP
Japan
Prior art keywords
layer
solder
semiconductor substrate
substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56104159A
Other languages
English (en)
Other versions
JPH0145220B2 (ja
Inventor
Hirotsugu Hattori
服部　裕嗣
Masahiro Kuwagata
桑形　正博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=14373276&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPS586143(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP56104159A priority Critical patent/JPS586143A/ja
Priority to US06/390,113 priority patent/US4480261A/en
Priority to CA000406337A priority patent/CA1189984A/en
Priority to DE8282105893T priority patent/DE3277953D1/de
Priority to EP82105893A priority patent/EP0070435B1/en
Publication of JPS586143A publication Critical patent/JPS586143A/ja
Publication of JPH0145220B2 publication Critical patent/JPH0145220B2/ja
Granted legal-status Critical Current

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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
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  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は半導体基板の基板支持体に接着される側の面に
形成される電極構造と、この電極を介して半導体基板を
支持体に鑞付接着する半田組成の改善おれた半導体装置
に関するものである。
半田鑞付のため、半導体基板に設ける電極金属には、（
１）半田との濡れ特性が良好である。（２）半田鑞付工
程で電極金属が半田中に融は込まず、電極金属と半導体
基板との間に剥離が生じない。（３）電極金属と半導体
基板との接着力が大きい。（４）熱疲労テストのような
長期の苛酷のライフテストに対して耐え得る信頼性の高
い材料である。（５）半田鑞付は時に半田と電極金属の
間で望ましくない化合物が形成されない。等の要件を具
備することが要求される。
従来、半田鑞付は用の半導体基板側の電極金属としては
電解又は無電界メッキによるニッケルメッキ層、もしく
は真空蒸着によるニッケル層が使用されている。ニッケ
ルは半田中に融は込むという問題がないのでこの点です
ぐれているが、半導体基板と強固な接着力を実現するた
めには比較的高温度の熱処理を必要とする。なお、メッ
キ方式によりニッケル層を形成する場合は、メッギ液中
に含有されている不純物によって表面が汚染されるおそ
れがあり、前処理工程が煩雑である。また、良好なオー
ミック接触状態を得るためにはニッケル層を形成する部
分の基板不純物濃度がある程度以上必要であり、オーミ
ック接触用の拡散層の形成工程が余分にいるなどという
欠点もあった。
上記の各種の欠点を改良し、半田鑞付は用としてのすぐ
れたニッケルの特徴を生かすための半導体基板用金属電
極としてクロム・ニッケル合金／ニッケルあるいはクロ
ム／クロム・ニッケル合金／ニッケルの多層構成電極が
知られている。しかしこのような多層電極を用いても半
田接着性の変動、バラツキにおいて必ずしも十分でなか
った。
すなわち、これらの多層電極層は通常の半田接着用電極
として十分に実用できるものではあるが、この最上層が
ニッケル□Ｈ）であることと、大量の工場生産において
は電極形成工程と半田接着工程の間に時間的な遅れがあ
ることが原因となり、保存期間中にＮｉの表面が多少酸
化するなどによりて、ロット間でＮｉの表面状態に差異
を生じ、半田鑞付けのバラツキのおこる原因となってい
た。
このため半田鑞付は工程の直前に保存状態によるロフト
間の差をな（１，Ｎｉ表面層の酸化層の影響を除去する
ため適当な表面処理がなされていた。
このため余分な工程が−り増える他、表面処理の条件管
理が厄恢であり、大量生産を前提とする工場用としては
Ｎｉを最上層とする多層電極には改善の余地があった。
一万、半導体基板と基板接続体に接着する場合、半田鑞
付は用電極金鵬とともに、半田材料自体が接着特性に大
きな影響を及ぼすことも明らかである。従って半田鑞付
けにおいては、単に半導体基板側の′ＦＩＩＬ極金属の
重金属ず、半田材料と組み合わせた総合的な観点からの
検討が必要であるｐなかんずく大電力を取り扱うパワー
トランジスタ等においては良好な熱疲労特性を実現する
ために、半田材料の脆化現象をも考慮した材料の選定が
極めて重要である。本発明は前記半導体基板の半田鑞付
けに要求される各種条件を満足させるため、電極金属側
と半田材料側の両者を総合的に考慮した新規な電極材料
構成と半田材料組成を提供するものである。
以下本発明の実施例を図面を参照して説明する。
図は本発明の一実施例にかかる半導体装置の断面構造を
示す図であり、図中１は半導体基板、２はクロム（００
層、３はＣｒ−Ｎｉ合金層、４はＮｉ層、６は貴金属層
、６は半田材料、７基板接続体に施したメッキ層、そし
て８基板接続体である。
かかる構造の半導体装置は以下のようにして形成される
。
先ず、半導体基板の半田鑞付けされる側の面に多層電極
として０ｒ５００人、Ｃτ−Ｎ１合金５００人。
−Ｎｉ３０００人の順序で、例えば多ソースの電子ビー
ム蒸着機を使用して真空を破らずに連続蒸着して形成す
る。最下層のＣｒ層２は電極金属と半導体基板例えばシ
リコンとの接着力を強固にするための役目を、第２層目
のＣｒ−Ｎｉ合金層３は下地のＣｒと最上層のＮｉを結
びつける役目を、さらに最上層のＮｉは半田中へ融は込
みに＜＜、シかも半田と濡れる性質が利用された半田鑞
付は用の金属としての役目を担う。なお、最下層を形成
するＣｒ層２はシリコン基板１に対して接着力が非常に
強固であるので、最下層の電極としては非常にすぐれた
ものである。なお、本発明者らの実験結果では、最下層
のＯｒを省略して第２層のＯｒ　−Ｎ　ｉ合金を最下層
に、第２層目にＮｉを付着したいわゆる２層構造の電極
構成を採用しても、３層構造と比べ多少接着力が落ちる
点を除けば、十分実用出来ることが判明した。しかし最
近のように、多ソースの電子ビーム蒸着機が容易に使用
できる状況下では、Ｏｒ層２を省略することなくシリコ
ン基板に対する接着力のよりすぐれた３層電極構造を採
用した方が望ましい事は言うまでもない。
ところで、　Ｎｉを最上層にした多層電極を用いるとき
には、半田鑞付は時にＮｉ表面層の影響を避ける目的で
半田鑞付は工程の直前に前処理工程の導入される事が多
い。前処理工程は生産能率上出来るだけ避ける万が望ま
しい。又前処理をしても半田鑞付は時にボイドの発生が
よく認められる。半田鑞付は用金稿として、ニッケルよ
りも更に化学的に安定でしかも半田に対して濡れ特性の
よりすぐれた金属について実験検討した結果、金、銀あ
るいは白金等の貴金属がこの目的に適している事が見い
出された。金あるいは白金を最上層金属として従来のＮ
ｉ層上に用いる場合約６００人〜１０００人の厚みで効
果があられれ、また、銀の場合は１０００Å以上できれ
ば３０００人程度で最も効果が大である事が判明した。
更にこれらの貴金属層を最上層として設けると、半田中
に含まれている錫（ａｎ）と、電極金属のＮｉが反応し
て固くてもろい５ｎ−Ｎｉ化合物が形成されるのを妨げ
る効果が奏される。接着半田層に５ｎ−Ｎｉ化合物が存
在すると熱疲労特性に悪影響を及ぼすので、貴金属層は
又特に大電力を扱うパワートランジスター等の熱疲労特
性の改善にも大きな効果がある。
多ソース電子ビーム蒸着機を使用してＣｒ層２゜Ｏｒ　
−Ｎ　ｉ金層ｓ、Ｎｉ層４を形成し、さらにこの上に貴
金属層６を設けて多層電極の形成された半導体基板１は
、半田６を介して基板接続体８へ鑞付けされる。基板接
続体８の素材としては銅（Ｃｕ）もしくは跣ニッケル合
金（Ｆｅ−Ｎｉ５が使用され。
半田との濡れを良くするため適当なメッキ層７カえばＮ
ｉメッキが施されているのが普通である。
また、半導体基板を鑞付けする半田には、（１）作業性
が良い。（２）半導体基板に対して濡れが良くボイド生
成がない。（３）！気抵抗が小さい。（４）熱伝導率が
高い。（５）鑞付は時に雰囲気ガスにより酸化されにく
い。（６）熱疲労特性がすぐれている。（７）接着強度
が大きい。などの性質が要求される。
半導体基板鑞付は用の半田は、単に半田材料の物理的、
化学的性質のみならず、半導体装置としての電気的、熱
的特性を十分に満足するものでなければならない。牛導
体用の低融点半田材料とじで鉛（ｐｂ）を主成分とした
半田とＳｎを主成分とした半田の２種類について検討し
た。ｐｂ　を主成分とした半田では、Ｐｂ／Ｓｎ系で８
ｎの含有量が重量比で２〜１０％残部がｐｂである組成
に、またａｎを主成分とした半田ではＳｎ／Ａｇ／Ｓｂ
の３成分系で、Ａｑが重量比で２〜１０％、Ｓｂが重量
比で０．２〜２０％、残部がＳｎである組成に選定した
とき、前記の諸条件を満足できることが実験的に確認で
きた。
なお、　Ｐｂ／ｓｎ系でａｎの含有量が重量比で２％未
満になると、溶融した半田の流れが非常に悪くなり、実
用上使用困難になる。−万Ｓｎの含有量が多くなると５
ｎ−Ｎ　ｉ化合物が発生し易くなり、１０重量％を超え
ると熱疲労特性の劣化が表面化する。Ｓｎ系ではＡｑの
添加により流れ特性が向上して、ボイドの含有量が減少
する。しかしながら、ｘｇが重量比で１０％を超えると
半田が脆化し、−万２％未満では効果が認められない。
ところで、Ｓｎ系はｓｂを添加すると酸化防止効果が増
大する。
ｓｂの含有量が重量比２０％を超えると固くて脆くなる
ので使用出来ない。又０．２％未満では効果が認められ
ない。ｐｂを主成分とした半田は使用時に比較的高温度
となる半導体素子に適しているのに０ 対して、Ｓｎ　を主成分とした半田は比較的低温度で使
用される半導体素子用に適している。実験結果ではＰｂ
系半田とＳｎ系半田とを比較した場合半導体装置の電気
的特性面では大差がなかった。
本発明の多層電極構成は、Ｐｂ系半田、　Ｓｎ系半田の
いずれに対しても （１）最上層の貴金属層は半田との濡れが極めて良いた
めボイドが殆んどない。
（２）ボイド減少の結果、実効的な接着面積が増大し熱
抵抗値は１０〜２０％減少する。
（３）２次破壊電圧が約１０％増加し、信頼性が向上す
る。
（４）　　破断テストにおいて接着強度が著しく向上す
る。
（６）　　半田鑞付は工程における工程管理が容易にな
る。
（６）　　５ｎ−Ｎ　ｉ化合物の形成が抑制されたため
熱疲労特性が向上する。
（η　電極金属最上層異面の酸化汚染がなく、鑞付前処
理が不要になる。
など改善の効果が大きい。
以上のように、本発明は半導体基板の低融点半田鑞付は
用電極および半田材料として半導装置製、造の作業性改
善、に大きな効果をもち、半導体装置の電気的特性、熱
的機械的特性、およびライ不特性の向上ができ、工業的
に極めて有用である。
【図面の簡単な説明】
図は本発明の詳細な説明するための半導体装置の断面構
造図である。 １・・・・・・半導体基板、２・・・・・・クロム層、
３・・・・・・クロム−ニッケル合金層％　４・・・・
・・ニッケル層、６−・・・・・金又は銀又は白金層、
６・・・・・・半田、７・・・・・・基板接続体入面メ
ッキ層、８・・・・・・基板接続体。

Claims (4)

    【特許請求の範囲】
  1. （１）基板支持体へ接着される側の表面上に、クロム−
    ニッケル合金層、ニッケル層および金、銀もしくは白金
    等の貴金属がこの順序で３層に積層された半導体基板を
    半田を介して前記基板へ接着したことを特徴とする半導
    体装置。
  2. （２）半導体基板面とクロム−ニッケル合金層との間に
    、クロム層が被着形成されていることを特徴とする特許
    請求の範囲第１項に記載の半導体装置。
  3. （３）半田の組成が、２〜１０重量バーセントの錫、残
    部が鉛に選定されていることを特徴とする特許請求の範
    囲第１項に記載の半導体装置。
  4. （４）半田の組成が、３〜１０重量パーセントの銀、０
    ．２〜２０重量バ〜セントのアンチモン、残部が錫に選
    定されていることを特徴とする特許請求の範囲第１項に
    記載の半導体装置。
JP56104159A 1981-07-02 1981-07-02 半導体装置 Granted JPS586143A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP56104159A JPS586143A (ja) 1981-07-02 1981-07-02 半導体装置
US06/390,113 US4480261A (en) 1981-07-02 1982-06-18 Contact structure for a semiconductor substrate on a mounting body
CA000406337A CA1189984A (en) 1981-07-02 1982-06-30 Contact structure for securing a semiconductor substrate to a mounting body
DE8282105893T DE3277953D1 (en) 1981-07-02 1982-07-01 Semiconductor device comprising a semiconductor substrate bonded to a mounting means
EP82105893A EP0070435B1 (en) 1981-07-02 1982-07-01 Semiconductor device comprising a semiconductor substrate bonded to a mounting means

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56104159A JPS586143A (ja) 1981-07-02 1981-07-02 半導体装置

Publications (2)

Publication Number Publication Date
JPS586143A true JPS586143A (ja) 1983-01-13
JPH0145220B2 JPH0145220B2 (ja) 1989-10-03

Family

ID=14373276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56104159A Granted JPS586143A (ja) 1981-07-02 1981-07-02 半導体装置

Country Status (5)

Country Link
US (1) US4480261A (ja)
EP (1) EP0070435B1 (ja)
JP (1) JPS586143A (ja)
CA (1) CA1189984A (ja)
DE (1) DE3277953D1 (ja)

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JPS63119242A (ja) * 1986-11-07 1988-05-23 Toshiba Corp 基板

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US4480261A (en) 1984-10-30
CA1189984A (en) 1985-07-02
EP0070435A2 (en) 1983-01-26
DE3277953D1 (en) 1988-02-11
JPH0145220B2 (ja) 1989-10-03
EP0070435A3 (en) 1984-11-21
EP0070435B1 (en) 1988-01-07

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