JPH0547812A - 半導体装置 - Google Patents

半導体装置

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Publication number
JPH0547812A
JPH0547812A JP3206776A JP20677691A JPH0547812A JP H0547812 A JPH0547812 A JP H0547812A JP 3206776 A JP3206776 A JP 3206776A JP 20677691 A JP20677691 A JP 20677691A JP H0547812 A JPH0547812 A JP H0547812A
Authority
JP
Japan
Prior art keywords
bonding material
semiconductor element
melting point
point solder
low melting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3206776A
Other languages
English (en)
Inventor
Shunichi Abe
俊一 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3206776A priority Critical patent/JPH0547812A/ja
Priority to US07/929,443 priority patent/US5317191A/en
Publication of JPH0547812A publication Critical patent/JPH0547812A/ja
Pending legal-status Critical Current

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Abstract

(57)【要約】 【目的】 この発明は、半導体装置、特に、半導体素子
を支持体に固定する際、接合材の組成を均一にする熱処
理時間を短縮化し、かつ、接合材を半導体素子の寸法に
合わせる必要をなくし製造効率を向上させた半導体装置
を得ることを目的とする。 【構成】 半導体素子１は、接合材２により支持体例え
ばダイパッド３に固定されている。接合材２は、低融点
はんだ２aを母相とし、この中に高融点はんだ２bの微細
粒子が均一に分散している。従って、低融点はんだ２a
のみを溶融状態とし、接合材２を半導体素子１、ダイパ
ッド３間に濡れ拡がらせることができる。また、低融点
はんだ２aと高融点はんだ２bの微細な粒子の界面面積が
大きく拡散が促進されるので、熱処理時間を短縮化する
ことができる。

Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】この発明は、半導体装置、特に、
低融点の接合材を母相とし、その中に高融点の接合材の
微細な粒子を均一に分散させた接合材を備えた半導体装
置に関するものである。
【０００２】
【従来の技術】図５は、従来の半導体装置を示す要部概
略断面図であり、図６は図５に示した半導体装置の接合
材の斜視図である。なお、図５は半導体素子を固定する
前の状態を示している。これらの図において、半導体素
子１は、接合材４によってダイパッド３に固定される。
この接合材４は、例えば３層構造となっており、中心部
の高融点はんだ４bの両表面部に低融点はんだ４aが積層
されている。
【０００３】従来の半導体装置は上述したように構成さ
れ、半導体素子１の固定は、まず、接合材４を半導体素
子１と同じ大きさに切り出し、これを半導体素子１とダ
イパッド３との間に挿入する。次いで、接合材４を低融
点はんだ４aの融点以上、高融点はんだ４bの融点以下の
温度に保持すると、低融点はんだ４aが溶融状態とな
り、これにより半導体素子１をダイパッド３に固定する
ことができる。さらに、その温度で保持すると、低融点
はんだ４a中の成分と高融点はんだ４b中の成分とが相互
に拡散し合い、最終的には均一な組成をもつ一層の接合
材となる。この接合材の融点は、低融点はんだ４aの融
点以上でかつ高融点はんだ４bの融点以下となり、その
融点は溶融前の低融点はんだ４a及び高融点はんだ４bの
組成、体積を変化させることにより制御可能である。こ
れによって、半導体素子１をダイパッド３に最終的に単
相の接合材で固定することができる。
【０００４】その後、半導体素子１の電極取出口と内部
リード（図示しない）の先端部とを、熱圧着方式、超音
波方式等のワイヤボンディング方法で金属細線により結
線する。次いで、モールド工程、リードカット工程、リ
ードベント工程、電気特性検査工程等を経て、半導体装
置の製造が完了する。
【０００５】
【発明が解決しようとする課題】上述したような半導体
装置では、半導体素子１の裏面全体に低融点はんだ４a
を濡れ拡がらせてダイパッド３に固定するためには、接
合材４を半導体素子１の寸法と同じ寸法にする必要があ
り、半導体素子１の寸法毎に接合材４の大きさを変えて
準備する必要があるという問題点があった。また、従来
の接合材４では、高融点はんだ４bと低融点はんだ４aの
界面が平面であるので相互拡散に使用される界面面積が
小さく、従って、相互拡散により接合材が所望の組成に
なるのに長時間の熱処理が必要であるという問題点があ
った。この発明は、このような問題点を解決するために
なされたもので、接合材の組成を均一にする熱処理時間
を短縮でき、かつ、接合材を供給する際に半導体素子の
寸法に合わせる必要のない接合材を用いた半導体装置を
得ることを目的とする。
【０００６】
【課題を解決するための手段】この発明に係る半導体装
置は、低融点接合材を母相とし、その中に高融点接合材
の微細な粒子を均一に分散させた接合材により半導体素
子を支持体に固定したものである。
【０００７】
【作用】この発明においては、低融点接合材の融点以
上、高融点接合材の融点以下に加熱することにより、低
融点接合材が溶融状態となり接合材全体が流動できるの
で、接合材を半導体素子の寸法に合わせる必要がなくな
り、かつ、低融点接合材と高融点接合材の接触面積が著
しく増大するので、接合材の組成を均一化するのに必要
な熱処理時間を短縮できる。
【０００８】
【実施例】図１は、この発明の一実施例による半導体装
置を示す概略側面断面図である。なお、各図中、同一符
号は同一又は相当部分を示している。図において、半導
体素子１は、接合材２により支持体例えばダイパッド３
に固定されている。図２は、接合材２の拡大斜視図であ
り、低融点はんだ２aを母相とし、この中に高融点はん
だ２bの微細粒子が均一に分散している。低融点はんだ
２aとしては、例えばＰb−６０Ｓnの共晶はんだが、高
融点はんだ２bとしては、例えばＰbが好適に使用でき
る。
【０００９】上述したように構成された半導体装置にお
いては、まず、接合材２を所定の寸法に切断後、図３に
示すように、接合材２を例えばＣu合金で作成されたダ
イパッド３上に載置する。この接合材２をＰb−６０Ｓn
の融点以上、Ｐbの融点以下の温度に加熱し保持する
と、Ｐb−６０Ｓnが溶融状態となる。この状態で、図４
に概略的に示すように、半導体素子１を押さえつけるこ
とにより、接合材２は半導体素子１とダイパッド３との
間に濡れ拡がり、Ｐbも均一に分散する。このような状
態が図１である。従って、接合材２を濡れ拡がらせるた
め、これを半導体素子１と同じ寸法にする必要はなく、
１つの大きさの接合材２で種々の大きさの半導体素子１
に対して適用することができる。
【００１０】上記接合材２をさらにその温度で保持し続
けると、溶融状態であるＰb−６０Ｓn中のＳnがＰb中へ
拡散して行く。この時、Ｐb−６０ＳnとＰb間の界面面
積が著しく大きいので、その拡散は速やかに進行すると
共に、接合材２は短時間で組成が均一となる。これによ
り、半導体素子１をダイパッド３へ固定できる。
【００１１】なお、上述した実施例では、低融点はんだ
２aとしてＰb−６０Ｓnを使用した場合を示したが、Ｉn
等を使用しても良く、上述と同様な効果を奏する。ま
た、高融点はんだ２bとしてＰbを使用した場合を示した
が、Ｐb−５Ｓn等も同様に使用できる。さらに、ダイパ
ッド３としてＣu合金を用いた場合を示したが、Ｆe合金
等であってもよく、上述と同様な効果を奏する。なお、
低融点はんだ２aに対する高融点はんだ２bの混合割合
は、接合材２が完全に溶融して均一な組成となった際、
所定の組成が得られるように定めればよい。また、高融
点はんだ２bの粒子形状は、接合材２が均一に拡がれ
ば、特に限定されるものではない。
【００１２】
【発明の効果】この発明は以上説明したとおり、半導体
素子と、この半導体素子を固定する支持体と、上記半導
体素子と上記支持体との間に配置され、上記半導体素子
を上記支持体に固定する接合材とを備え、この接合材
は、低融点の接合材を母相とし、その中に高融点の接合
材の微細な粒子を均一に分散した接合材としたので、接
合材の組成を均一にする熱処理時間を短縮でき、かつ、
接合材を供給する際に半導体素子の寸法に合わせる必要
がなく、半導体装置を効率良く製造することができると
いう効果を奏する。
【図面の簡単な説明】
【図１】この発明の一実施例による半導体装置を示す概
略側面断面図である。
【図２】図１に示した半導体装置の接合材を示す拡大斜
視図である。
【図３】接合材をダイパッドに載置した状態を示す斜視
図である。
【図４】半導体素子で接合材を押さえ付ける前の状態を
示す概略側面断面図である。
【図５】従来の半導体装置における半導体素子をダイパ
ッドに固定する前の状態を示す概略側面断面図である。
【図６】図５に示した半導体装置の接合材を示す拡大斜
視図である。
【符号の説明】
１ 半導体素子 ２ 接合材 ２a 低融点はんだ ２b 高融点はんだ ３ ダイパッド

Claims (1)

    【特許請求の範囲】
  1. 【請求項１】 半導体素子と、 この半導体素子を固定する支持体と、 上記半導体素子と上記支持体との間に配置され、上記半
    導体素子を上記支持体に固定する接合材とを備え、 この接合材は、低融点の接合材を母相とし、その中に高
    融点の接合材の微細な粒子を均一に分散した接合材であ
    ることを特徴とする半導体装置。
JP3206776A 1991-08-19 1991-08-19 半導体装置 Pending JPH0547812A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP3206776A JPH0547812A (ja) 1991-08-19 1991-08-19 半導体装置
US07/929,443 US5317191A (en) 1991-08-19 1992-08-14 Low-melting-point junction material having high-melting-point particles uniformly dispersed therein

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3206776A JPH0547812A (ja) 1991-08-19 1991-08-19 半導体装置

Publications (1)

Publication Number Publication Date
JPH0547812A true JPH0547812A (ja) 1993-02-26

Family

ID=16528901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3206776A Pending JPH0547812A (ja) 1991-08-19 1991-08-19 半導体装置

Country Status (2)

Country Link
US (1) US5317191A (ja)
JP (1) JPH0547812A (ja)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5428249A (en) 1992-07-15 1995-06-27 Canon Kabushiki Kaisha Photovoltaic device with improved collector electrode
US5542174A (en) * 1994-09-15 1996-08-06 Intel Corporation Method and apparatus for forming solder balls and solder columns
DE19512725C1 (de) * 1995-04-05 1996-09-12 Orga Kartensysteme Gmbh Ausweiskarte o.dgl. in Form einer Chipkarte
US5736074A (en) * 1995-06-30 1998-04-07 Micro Fab Technologies, Inc. Manufacture of coated spheres
US5803340A (en) * 1995-09-29 1998-09-08 Delco Electronics Corporation Composite solder paste for flip chip bumping
WO1997012718A1 (en) * 1995-10-06 1997-04-10 Brown University Research Foundation Soldering methods and compositions
JPH09307051A (ja) * 1996-05-15 1997-11-28 Toshiba Corp 樹脂封止型半導体装置及びその製造方法
US5682066A (en) * 1996-08-12 1997-10-28 Motorola, Inc. Microelectronic assembly including a transparent encapsulant
US5928404A (en) * 1997-03-28 1999-07-27 Ford Motor Company Electrical solder and method of manufacturing
US5861678A (en) 1997-12-23 1999-01-19 Micron Technology, Inc. Method and system for attaching semiconductor dice to substrates
JP4051893B2 (ja) * 2001-04-18 2008-02-27 株式会社日立製作所 電子機器
KR100695116B1 (ko) 2004-12-27 2007-03-14 삼성전기주식회사 디바이스 패키지용 솔더

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2735050A (en) * 1952-10-22 1956-02-14 Liquid soldering process and articles
NL274434A (ja) * 1961-02-06 1900-01-01
JPS5535238B2 (ja) * 1975-01-24 1980-09-12
JPS5614069A (en) * 1979-07-16 1981-02-10 Nec Corp Soldering method and soldering material
JPS586143A (ja) * 1981-07-02 1983-01-13 Matsushita Electronics Corp 半導体装置
JPS5839047A (ja) * 1981-09-02 1983-03-07 Hitachi Ltd 半導体装置およびその製法
JPS62179889A (ja) * 1986-01-31 1987-08-07 Senjiyu Kinzoku Kogyo Kk クリ−ムはんだ
US4865654A (en) * 1986-10-03 1989-09-12 Texas Instruments Incorporated Delayed reflow alloy mix solder paste
US4847675A (en) * 1987-05-07 1989-07-11 The Aerospace Corporation Stable rare-earth alloy graded junction contact devices using III-V type substrates
JPS6446934A (en) * 1987-08-17 1989-02-21 Mitsubishi Electric Corp Detection of quantity of etched surface of solid
JPH02281742A (ja) * 1989-04-24 1990-11-19 Origin Electric Co Ltd 半導体デバイスおよび整列方法
JPH07118498B2 (ja) * 1989-06-15 1995-12-18 旭化成工業株式会社 電気的接合部
JPH04270092A (ja) * 1991-01-21 1992-09-25 Mitsubishi Electric Corp 半田材料及び接合方法

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