JPS58197874A - 半導体装置およびその製法 - Google Patents
半導体装置およびその製法Info
- Publication number
- JPS58197874A JPS58197874A JP57080943A JP8094382A JPS58197874A JP S58197874 A JPS58197874 A JP S58197874A JP 57080943 A JP57080943 A JP 57080943A JP 8094382 A JP8094382 A JP 8094382A JP S58197874 A JPS58197874 A JP S58197874A
- Authority
- JP
- Japan
- Prior art keywords
- fuse element
- layer
- aluminum
- wiring
- fuse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000004519 manufacturing process Methods 0.000 title description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 10
- 239000002184 metal Substances 0.000 claims abstract description 10
- 238000009413 insulation Methods 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 abstract description 26
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 26
- 238000000034 method Methods 0.000 abstract description 26
- 238000005530 etching Methods 0.000 abstract description 8
- 238000011109 contamination Methods 0.000 abstract description 3
- 239000007792 gaseous phase Substances 0.000 abstract 3
- 238000009792 diffusion process Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 239000012808 vapor phase Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- 241000270281 Coluber constrictor Species 0.000 description 1
- 208000033809 Suppuration Diseases 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- OQZCSNDVOWYALR-UHFFFAOYSA-N flurochloridone Chemical compound FC(F)(F)C1=CC=CC(N2C(C(Cl)C(CCl)C2)=O)=C1 OQZCSNDVOWYALR-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57080943A JPS58197874A (ja) | 1982-05-14 | 1982-05-14 | 半導体装置およびその製法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57080943A JPS58197874A (ja) | 1982-05-14 | 1982-05-14 | 半導体装置およびその製法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58197874A true JPS58197874A (ja) | 1983-11-17 |
| JPH0332230B2 JPH0332230B2 (enrdf_load_stackoverflow) | 1991-05-10 |
Family
ID=13732567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57080943A Granted JPS58197874A (ja) | 1982-05-14 | 1982-05-14 | 半導体装置およびその製法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58197874A (enrdf_load_stackoverflow) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60158660A (ja) * | 1984-01-28 | 1985-08-20 | Toshiba Corp | 半導体メモリの製造方法 |
| JPS6355955A (ja) * | 1986-08-26 | 1988-03-10 | Nec Corp | 半導体装置 |
| JPS63161641A (ja) * | 1986-12-25 | 1988-07-05 | Nec Corp | 半導体記憶装置 |
| JPH0249450A (ja) * | 1988-03-18 | 1990-02-19 | Digital Equip Corp <Dec> | 集積回路を変更する方法 |
| JP2004515061A (ja) * | 2000-11-27 | 2004-05-20 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Ｍｏｓデバイスベースのセル構造を有するポリヒューズｒｏｍ、及びそれに対する読出しと書込みの方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS567467A (en) * | 1979-07-02 | 1981-01-26 | Nec Corp | Semiconductor memory device |
| JPS5685846A (en) * | 1979-12-14 | 1981-07-13 | Fujitsu Ltd | Semiconductor integrated circuit device |
-
1982
- 1982-05-14 JP JP57080943A patent/JPS58197874A/ja active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS567467A (en) * | 1979-07-02 | 1981-01-26 | Nec Corp | Semiconductor memory device |
| JPS5685846A (en) * | 1979-12-14 | 1981-07-13 | Fujitsu Ltd | Semiconductor integrated circuit device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60158660A (ja) * | 1984-01-28 | 1985-08-20 | Toshiba Corp | 半導体メモリの製造方法 |
| JPS6355955A (ja) * | 1986-08-26 | 1988-03-10 | Nec Corp | 半導体装置 |
| JPS63161641A (ja) * | 1986-12-25 | 1988-07-05 | Nec Corp | 半導体記憶装置 |
| JPH0249450A (ja) * | 1988-03-18 | 1990-02-19 | Digital Equip Corp <Dec> | 集積回路を変更する方法 |
| JP2004515061A (ja) * | 2000-11-27 | 2004-05-20 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Ｍｏｓデバイスベースのセル構造を有するポリヒューズｒｏｍ、及びそれに対する読出しと書込みの方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0332230B2 (enrdf_load_stackoverflow) | 1991-05-10 |
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