JPS577153A - Preparation of semiconductor device - Google Patents
Preparation of semiconductor deviceInfo
- Publication number
- JPS577153A JPS577153A JP8117480A JP8117480A JPS577153A JP S577153 A JPS577153 A JP S577153A JP 8117480 A JP8117480 A JP 8117480A JP 8117480 A JP8117480 A JP 8117480A JP S577153 A JPS577153 A JP S577153A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- layer
- type
- poly
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0163—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including enhancement-mode IGFETs and depletion-mode IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8117480A JPS577153A (en) | 1980-06-16 | 1980-06-16 | Preparation of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8117480A JPS577153A (en) | 1980-06-16 | 1980-06-16 | Preparation of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS577153A true JPS577153A (en) | 1982-01-14 |
Family
ID=13739093
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8117480A Pending JPS577153A (en) | 1980-06-16 | 1980-06-16 | Preparation of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS577153A (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1983003923A1 (en) * | 1982-04-23 | 1983-11-10 | Western Electric Company, Inc. | Semiconductor integrated circuit structures having insulated conductors |
| US4737471A (en) * | 1985-06-19 | 1988-04-12 | Fujitsu Limited | Method for fabricating an insulated-gate FET having a narrow channel width |
| US4985373A (en) * | 1982-04-23 | 1991-01-15 | At&T Bell Laboratories | Multiple insulating layer for two-level interconnected metallization in semiconductor integrated circuit structures |
-
1980
- 1980-06-16 JP JP8117480A patent/JPS577153A/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1983003923A1 (en) * | 1982-04-23 | 1983-11-10 | Western Electric Company, Inc. | Semiconductor integrated circuit structures having insulated conductors |
| US4985373A (en) * | 1982-04-23 | 1991-01-15 | At&T Bell Laboratories | Multiple insulating layer for two-level interconnected metallization in semiconductor integrated circuit structures |
| US4737471A (en) * | 1985-06-19 | 1988-04-12 | Fujitsu Limited | Method for fabricating an insulated-gate FET having a narrow channel width |
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