JPS5743472A - Partial gate type non-volatile memory - Google Patents

Partial gate type non-volatile memory

Info

Publication number
JPS5743472A
JPS5743472A JP56108381A JP10838181A JPS5743472A JP S5743472 A JPS5743472 A JP S5743472A JP 56108381 A JP56108381 A JP 56108381A JP 10838181 A JP10838181 A JP 10838181A JP S5743472 A JPS5743472 A JP S5743472A
Authority
JP
Japan
Prior art keywords
gate electrode
region
volatile memory
type non
gate type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56108381A
Other languages
Japanese (ja)
Other versions
JPH0228905B2 (en
Inventor
Yutaka Hayashi
Yasuo Tarui
Kiyoko Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP56108381A priority Critical patent/JPS5743472A/en
Publication of JPS5743472A publication Critical patent/JPS5743472A/en
Publication of JPH0228905B2 publication Critical patent/JPH0228905B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To enable the erasure and rewriting of a stored content in a partial gate type non-volatile memory by forming the second gate electrode further on a silicon oxidized film. CONSTITUTION:Drain and source regions 25, 26 are formed at the predetermined interval in a semiconductor substrate 24, and a gate insulating film 22, the first gate electrode 33, an insulating film (silicon oxidized film) 27 and the second gate electrode 23 are laminated between the regions 25 and 26 on the substrate 24. In this case, the first gate electrode 33 is formed in an off-set structure so as to be superposed only on the other range partly retained of a channel region. Since an electric field 34 is formed directly between the remaining region of the channel region and a gate electrode 23 faced with the remaining region in this manner, in can accelerate the carrier injection efficiency from a pinch-off region 31, and the ON and OFF operations of a field effect transistor 21 can be effectively performed by controlling the electric field 34.
JP56108381A 1981-07-11 1981-07-11 Partial gate type non-volatile memory Granted JPS5743472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56108381A JPS5743472A (en) 1981-07-11 1981-07-11 Partial gate type non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56108381A JPS5743472A (en) 1981-07-11 1981-07-11 Partial gate type non-volatile memory

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2639880A Division JPS55127068A (en) 1980-03-03 1980-03-03 Field effect transistor for memory

Publications (2)

Publication Number Publication Date
JPS5743472A true JPS5743472A (en) 1982-03-11
JPH0228905B2 JPH0228905B2 (en) 1990-06-27

Family

ID=14483322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56108381A Granted JPS5743472A (en) 1981-07-11 1981-07-11 Partial gate type non-volatile memory

Country Status (1)

Country Link
JP (1) JPS5743472A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5537107A (en) * 1978-09-05 1980-03-15 Iseki Agricult Mach Separator of thresher

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5537107A (en) * 1978-09-05 1980-03-15 Iseki Agricult Mach Separator of thresher

Also Published As

Publication number Publication date
JPH0228905B2 (en) 1990-06-27

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