JPS57164574A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS57164574A
JPS57164574A JP56049775A JP4977581A JPS57164574A JP S57164574 A JPS57164574 A JP S57164574A JP 56049775 A JP56049775 A JP 56049775A JP 4977581 A JP4977581 A JP 4977581A JP S57164574 A JPS57164574 A JP S57164574A
Authority
JP
Japan
Prior art keywords
memory device
semiconductor memory
gate
polycrystalline
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56049775A
Other languages
Japanese (ja)
Inventor
Kazuo Yudasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP56049775A priority Critical patent/JPS57164574A/en
Publication of JPS57164574A publication Critical patent/JPS57164574A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation

Abstract

PURPOSE:To stabilize the operation of an MOSFET, by providing a polycrystalline Si having P-N junction on a floating type gate electrode via an insulating film. CONSTITUTION:The floating gate 4 is provided on a semiconductor substrate 1 having source and drain regions 2, 2' via a gate oxide film 3. Next, polycrystalline Si 7 and 8 having P-N junction are provided on this floating gate 4 via the insulating film 5. Thus, the gate oxide film of the MOSFET operating in writing is prevented from deterioration to perform the stable operation.
JP56049775A 1981-04-02 1981-04-02 Semiconductor memory device Pending JPS57164574A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56049775A JPS57164574A (en) 1981-04-02 1981-04-02 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56049775A JPS57164574A (en) 1981-04-02 1981-04-02 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS57164574A true JPS57164574A (en) 1982-10-09

Family

ID=12840538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56049775A Pending JPS57164574A (en) 1981-04-02 1981-04-02 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS57164574A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005538552A (en) * 2002-09-12 2005-12-15 グリフィス・ユニバーシティ Memory cell

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52104078A (en) * 1976-02-27 1977-09-01 Hitachi Ltd Semiconductor unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52104078A (en) * 1976-02-27 1977-09-01 Hitachi Ltd Semiconductor unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005538552A (en) * 2002-09-12 2005-12-15 グリフィス・ユニバーシティ Memory cell

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