JPS5736868A - Manufacture of nonvolatile semiconductor memory device - Google Patents

Manufacture of nonvolatile semiconductor memory device

Info

Publication number
JPS5736868A
JPS5736868A JP11101280A JP11101280A JPS5736868A JP S5736868 A JPS5736868 A JP S5736868A JP 11101280 A JP11101280 A JP 11101280A JP 11101280 A JP11101280 A JP 11101280A JP S5736868 A JPS5736868 A JP S5736868A
Authority
JP
Japan
Prior art keywords
manufacture
memory device
semiconductor memory
nonvolatile semiconductor
writing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11101280A
Other languages
Japanese (ja)
Inventor
Sumio Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11101280A priority Critical patent/JPS5736868A/en
Publication of JPS5736868A publication Critical patent/JPS5736868A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To enable the gain of high speed writing and the writing amount by maintaining a common source potential at the writing time at the potential of the direction for preventing the leakage current of a memory cell. CONSTITUTION:A transistor region 22 is isolated via a field oxidized film 32 in a semiconductor substrate 31, and drain 33 and source 34 are formed in the region 22. The first polysilicons 32-1, 23-2 and the second polysilicon 24 are formed via an insulating layer thereon. The second polysilicon 24 is the gate electrode of a transistor 9, and the first polysilicons 23-1, 23-2 are connected to the ground.
JP11101280A 1980-08-14 1980-08-14 Manufacture of nonvolatile semiconductor memory device Pending JPS5736868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11101280A JPS5736868A (en) 1980-08-14 1980-08-14 Manufacture of nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11101280A JPS5736868A (en) 1980-08-14 1980-08-14 Manufacture of nonvolatile semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS5736868A true JPS5736868A (en) 1982-02-27

Family

ID=14550152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11101280A Pending JPS5736868A (en) 1980-08-14 1980-08-14 Manufacture of nonvolatile semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5736868A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57130288A (en) * 1981-02-03 1982-08-12 Nec Corp Nonvolatile storage device
US5739569A (en) * 1991-05-15 1998-04-14 Texas Instruments Incorporated Non-volatile memory cell with oxide and nitride tunneling layers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57130288A (en) * 1981-02-03 1982-08-12 Nec Corp Nonvolatile storage device
JPS6120960B2 (en) * 1981-02-03 1986-05-24 Nippon Electric Co
US5739569A (en) * 1991-05-15 1998-04-14 Texas Instruments Incorporated Non-volatile memory cell with oxide and nitride tunneling layers

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