JPS54156483A - Non-volatile semiconductor memory device - Google Patents

Non-volatile semiconductor memory device

Info

Publication number
JPS54156483A
JPS54156483A JP6524978A JP6524978A JPS54156483A JP S54156483 A JPS54156483 A JP S54156483A JP 6524978 A JP6524978 A JP 6524978A JP 6524978 A JP6524978 A JP 6524978A JP S54156483 A JPS54156483 A JP S54156483A
Authority
JP
Japan
Prior art keywords
layer
oxide film
source
gate
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6524978A
Other languages
Japanese (ja)
Other versions
JPS6048111B2 (en
Inventor
Machio Yamagishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP53065249A priority Critical patent/JPS6048111B2/en
Publication of JPS54156483A publication Critical patent/JPS54156483A/en
Publication of JPS6048111B2 publication Critical patent/JPS6048111B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To reduce the number of contacts by taking the substrate as the source and to increase the degree of integration, by obtaining sufficient gm, small junction capacitance and high dielectric strength, through the use of DSA technology to the stack gate type non-volatile memory device. CONSTITUTION:The N<-> epitaxial layer 28 is laminated on the N type substrate 27, and oxide film 32, nitride film 31, and oxide film 30 are laminated. The films 32 to 30 are opened, B diffusion layer 44 is formed, and field oxide film 43 and gate oxide film 39 are formed. The polycrystal Si floating gate is selectively formed, and the polycrystal Si control gate 42 is formed via the second gate oxide film 40. Next, ion injection is selectively made, and P layer 35 is formed deeper than the N<-> layer 28. The N<+> source 37 and drain 38 are formed inside and outside the layer 35, and the electrode 45 is attached. Since the N<-> layer 28 is in contact with the layer 35 being channel, the dielectric strength is high, junction capacitance is small, and since the current flows from the source 37 to the substrate 27, the source connection hole and electrode are unnecessary, to increase the degree of integration.
JP53065249A 1978-05-30 1978-05-30 Non-volatile semiconductor memory device Expired JPS6048111B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53065249A JPS6048111B2 (en) 1978-05-30 1978-05-30 Non-volatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53065249A JPS6048111B2 (en) 1978-05-30 1978-05-30 Non-volatile semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS54156483A true JPS54156483A (en) 1979-12-10
JPS6048111B2 JPS6048111B2 (en) 1985-10-25

Family

ID=13281434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53065249A Expired JPS6048111B2 (en) 1978-05-30 1978-05-30 Non-volatile semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6048111B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868619A (en) * 1984-11-21 1989-09-19 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
US5079603A (en) * 1986-05-26 1992-01-07 Hitachi, Ltd. Semiconductor memory device
US5117269A (en) * 1989-03-09 1992-05-26 Sgs-Thomson Microelectronics S.R.L. Eprom memory array with crosspoint configuration
US5189497A (en) * 1986-05-26 1993-02-23 Hitachi, Ltd. Semiconductor memory device
US5300802A (en) * 1988-11-09 1994-04-05 Hitachi, Ltd. Semiconductor integrated circuit device having single-element type non-volatile memory elements
US5726470A (en) * 1995-02-28 1998-03-10 Nippon Steel Corporation Nonvolatile semiconductor memory device and method of fabrication of the same
US9530782B2 (en) 2014-03-12 2016-12-27 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device comprising memory gate and peripheral gate having different thicknesses

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868619A (en) * 1984-11-21 1989-09-19 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
US5656522A (en) * 1986-05-26 1997-08-12 Hitachi, Ltd. Method of manufacturing a semiconductor integrated circuit device having single-element type non-volatile memory elements
US5079603A (en) * 1986-05-26 1992-01-07 Hitachi, Ltd. Semiconductor memory device
US5656839A (en) * 1986-05-26 1997-08-12 Hitachi, Ltd. Semiconductor integrated circuit device having single-element type nonvolatile memory elements
US5189497A (en) * 1986-05-26 1993-02-23 Hitachi, Ltd. Semiconductor memory device
US5300802A (en) * 1988-11-09 1994-04-05 Hitachi, Ltd. Semiconductor integrated circuit device having single-element type non-volatile memory elements
US6960501B2 (en) 1988-11-09 2005-11-01 Renesas Technology Corp. Method of manufacturing a semiconductor memory device having a non-volatile memory cell portion with single misfet transistor type memory cells and a peripheral circuit portion with misfets
US5407853A (en) * 1988-11-09 1995-04-18 Hitachi, Ltd. Method of making semiconductor integrated circuit device having single-element type non-volatile memory elements
US7399667B2 (en) 1988-11-09 2008-07-15 Renesas Technology Corp. Method of manufacturing a semiconductor integrated circuit device having single-element type non-volatile memory elements
US7071050B2 (en) 1988-11-09 2006-07-04 Hitachi, Ltd. Semiconductor integrated circuit device having single-element type non-volatile memory elements
US5904518A (en) * 1988-11-09 1999-05-18 Hitachi, Ltd. Method of manufacturing a semiconductor IC device having single transistor type nonvolatile memory cells
US5629541A (en) * 1988-11-09 1997-05-13 Hitachi, Ltd. Semiconductor memory device constituted by single transistor type non-volatile cells and facilitated for both electrical erasing and writing of data
US6255690B1 (en) 1988-11-09 2001-07-03 Hitachi, Ltd. Non-volatile semiconductor memory device
US6451643B2 (en) 1988-11-09 2002-09-17 Hitachi, Ltd. Method of manufacturing a semiconductor device having non-volatile memory cell portion with single transistor type memory cells and peripheral portion with MISFETs
US6777282B2 (en) 1988-11-09 2004-08-17 Renesas Technology Corp. Method of manufacturing a semiconductor memory device having a memory cell portion including MISFETs with a floating gate and a peripheral circuit portion with MISFETs
US5117269A (en) * 1989-03-09 1992-05-26 Sgs-Thomson Microelectronics S.R.L. Eprom memory array with crosspoint configuration
US5960283A (en) * 1995-02-28 1999-09-28 Nippon Steel Corporation Nonvolatile semiconductor memory device and method of fabrication of the same
US5726470A (en) * 1995-02-28 1998-03-10 Nippon Steel Corporation Nonvolatile semiconductor memory device and method of fabrication of the same
US9530782B2 (en) 2014-03-12 2016-12-27 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device comprising memory gate and peripheral gate having different thicknesses

Also Published As

Publication number Publication date
JPS6048111B2 (en) 1985-10-25

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