JPS5718365A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS5718365A
JPS5718365A JP9352480A JP9352480A JPS5718365A JP S5718365 A JPS5718365 A JP S5718365A JP 9352480 A JP9352480 A JP 9352480A JP 9352480 A JP9352480 A JP 9352480A JP S5718365 A JPS5718365 A JP S5718365A
Authority
JP
Japan
Prior art keywords
vmosfet
withstand voltage
drain
type semiconductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9352480A
Other languages
English (en)
Other versions
JPH0216022B2 (ja
Inventor
Daisuke Ueda
Hiromitsu Takagi
Kota Kano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP9352480A priority Critical patent/JPS5718365A/ja
Publication of JPS5718365A publication Critical patent/JPS5718365A/ja
Publication of JPH0216022B2 publication Critical patent/JPH0216022B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
JP9352480A 1980-07-08 1980-07-08 Semiconductor device and manufacture thereof Granted JPS5718365A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9352480A JPS5718365A (en) 1980-07-08 1980-07-08 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9352480A JPS5718365A (en) 1980-07-08 1980-07-08 Semiconductor device and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS5718365A true JPS5718365A (en) 1982-01-30
JPH0216022B2 JPH0216022B2 (ja) 1990-04-13

Family

ID=14084701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9352480A Granted JPS5718365A (en) 1980-07-08 1980-07-08 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5718365A (ja)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61142178U (ja) * 1985-02-25 1986-09-02
FR2776837A1 (fr) * 1998-01-27 1999-10-01 Fairchild Semiconductor Architecture de bus a transistor mosfet de puissance a couplage de champ, utilisant la technologie a tranchees
US6015737A (en) * 1991-07-26 2000-01-18 Denso Corporation Production method of a vertical type MOSFET
JP2000332246A (ja) * 1999-05-10 2000-11-30 Intersil Corp 自己整列トレンチを有するmosゲートデバイスを形成するプロセス
US6429481B1 (en) 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
US6603173B1 (en) 1991-07-26 2003-08-05 Denso Corporation Vertical type MOSFET
US6627950B1 (en) 1988-12-27 2003-09-30 Siliconix, Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
EP1469524A2 (en) * 1991-08-08 2004-10-20 Kabushiki Kaisha Toshiba Insulated trench gate bipolar transistor
JP2020096083A (ja) * 2018-12-12 2020-06-18 トヨタ自動車株式会社 トレンチゲート型のスイッチング素子の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS544079A (en) * 1977-06-10 1979-01-12 Sony Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS544079A (en) * 1977-06-10 1979-01-12 Sony Corp Semiconductor device

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0442530Y2 (ja) * 1985-02-25 1992-10-07
JPS61142178U (ja) * 1985-02-25 1986-09-02
US6627950B1 (en) 1988-12-27 2003-09-30 Siliconix, Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
US6603173B1 (en) 1991-07-26 2003-08-05 Denso Corporation Vertical type MOSFET
US6015737A (en) * 1991-07-26 2000-01-18 Denso Corporation Production method of a vertical type MOSFET
EP1469524A3 (en) * 1991-08-08 2005-07-06 Kabushiki Kaisha Toshiba Insulated trench gate bipolar transistor
EP1469524A2 (en) * 1991-08-08 2004-10-20 Kabushiki Kaisha Toshiba Insulated trench gate bipolar transistor
US6828195B2 (en) 1997-11-14 2004-12-07 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US6429481B1 (en) 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
US6710406B2 (en) 1997-11-14 2004-03-23 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
US7148111B2 (en) 1997-11-14 2006-12-12 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US7696571B2 (en) 1997-11-14 2010-04-13 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US8044463B2 (en) 1997-11-14 2011-10-25 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US6673680B2 (en) 1998-01-27 2004-01-06 Fairchild Semiconductor Corporation Field coupled power MOSFET bus architecture using trench technology
US6396102B1 (en) * 1998-01-27 2002-05-28 Fairchild Semiconductor Corporation Field coupled power MOSFET bus architecture using trench technology
FR2776837A1 (fr) * 1998-01-27 1999-10-01 Fairchild Semiconductor Architecture de bus a transistor mosfet de puissance a couplage de champ, utilisant la technologie a tranchees
JP2000332246A (ja) * 1999-05-10 2000-11-30 Intersil Corp 自己整列トレンチを有するmosゲートデバイスを形成するプロセス
JP2020096083A (ja) * 2018-12-12 2020-06-18 トヨタ自動車株式会社 トレンチゲート型のスイッチング素子の製造方法

Also Published As

Publication number Publication date
JPH0216022B2 (ja) 1990-04-13

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