JPS5698857A - Complex integrated circuit device - Google Patents

Complex integrated circuit device

Info

Publication number
JPS5698857A
JPS5698857A JP181080A JP181080A JPS5698857A JP S5698857 A JPS5698857 A JP S5698857A JP 181080 A JP181080 A JP 181080A JP 181080 A JP181080 A JP 181080A JP S5698857 A JPS5698857 A JP S5698857A
Authority
JP
Japan
Prior art keywords
type
region
layer
diffusion
autodoping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP181080A
Other languages
Japanese (ja)
Inventor
Goro Mitarai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP181080A priority Critical patent/JPS5698857A/en
Publication of JPS5698857A publication Critical patent/JPS5698857A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain both the bipolar transistor and the FET in a single epitaxial growth, by making use of the autodoping and outward diffusion of the impurity reverse conduction that takes place when the epitaxial layer of a single conduction type is grown. CONSTITUTION:In the P type Si substrate, separating by the P type region 2, the N type region 21b of the N channel FET and the N type region 21a for the bipolar transistor are respectively diffusion-formed. The P type gate region 5 is formed in the region 21b. The N type layer 6 is epitaxially grown on the whole surface, and by means of the autodoping and the outward diffusion at this time the regions 2 and 5 come up in the layer 6 respectively. In the P type region 7 bordering on the region 2, the layer 6 is isolated and the p type region 8 is diffusion-formed on both ends of the layer 5. In the island region 22, the P type gate region 9 and the N<+> type drain and source regions 10 and 11 are diffusion-formed. In another island region 23, the P type base region 14, the N type emitter region 15 and the N<+> type collector region 16 are respectively formed.
JP181080A 1980-01-10 1980-01-10 Complex integrated circuit device Pending JPS5698857A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP181080A JPS5698857A (en) 1980-01-10 1980-01-10 Complex integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP181080A JPS5698857A (en) 1980-01-10 1980-01-10 Complex integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5698857A true JPS5698857A (en) 1981-08-08

Family

ID=11511924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP181080A Pending JPS5698857A (en) 1980-01-10 1980-01-10 Complex integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5698857A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436069A (en) * 1987-07-31 1989-02-07 Nec Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436069A (en) * 1987-07-31 1989-02-07 Nec Corp Manufacture of semiconductor device

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