JPS57211278A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57211278A
JPS57211278A JP9719281A JP9719281A JPS57211278A JP S57211278 A JPS57211278 A JP S57211278A JP 9719281 A JP9719281 A JP 9719281A JP 9719281 A JP9719281 A JP 9719281A JP S57211278 A JPS57211278 A JP S57211278A
Authority
JP
Japan
Prior art keywords
region
regions
type
layer
shaped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9719281A
Other languages
Japanese (ja)
Inventor
Tetsuji Yuasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9719281A priority Critical patent/JPS57211278A/en
Publication of JPS57211278A publication Critical patent/JPS57211278A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain an FET, saturation currents thereof do not fluctuate, by surrounding source and drain regions by the gate region of high impurity concentration and forming a reverse conduction type top gate region to a channel region through a high concentration impurity region when manufacturing the J- FET. CONSTITUTION:An N<+> type buried region 2 is diffused and shaped to a P type Si substrate 1, an N type layer 3 is grown to the whole surface containing the region 2 in epitaxial process, and the layer 3 is insularly isolated by a P type region 4 reaching the substrate 1 while making the region 2 contain. A P type source region 5 and drain region 6 are diffused and shaped to the layer 3 insularly formed, and the N<+> type gate region 17 is formed into the layer 3 while surrounding these regions. P<+> type regions 19 having concentration higher than the substrate 1 are shaped into the channel regions formed among the regions 5, 6 and 17 through ion inplantation, the N<+> type top gate regions 20 are shaped onto the regions 19, and these regions are surrounded by thick oxide film 8.
JP9719281A 1981-06-23 1981-06-23 Semiconductor device Pending JPS57211278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9719281A JPS57211278A (en) 1981-06-23 1981-06-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9719281A JPS57211278A (en) 1981-06-23 1981-06-23 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57211278A true JPS57211278A (en) 1982-12-25

Family

ID=14185715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9719281A Pending JPS57211278A (en) 1981-06-23 1981-06-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57211278A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62196360U (en) * 1986-06-05 1987-12-14
EP0849771A1 (en) * 1996-12-19 1998-06-24 Motorola Semiconducteurs S.A. Method of forming a depletion jfet and method of forming a depletion jfet and a bipolar transistor on a semiconductor substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54114983A (en) * 1978-02-27 1979-09-07 Nec Corp Semiconductor device
JPS54114984A (en) * 1978-02-27 1979-09-07 Nec Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54114983A (en) * 1978-02-27 1979-09-07 Nec Corp Semiconductor device
JPS54114984A (en) * 1978-02-27 1979-09-07 Nec Corp Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62196360U (en) * 1986-06-05 1987-12-14
US4816880A (en) * 1986-06-05 1989-03-28 Nissan Motor Co., Ltd. Junction field effect transistor
EP0849771A1 (en) * 1996-12-19 1998-06-24 Motorola Semiconducteurs S.A. Method of forming a depletion jfet and method of forming a depletion jfet and a bipolar transistor on a semiconductor substrate

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