JPS57143859A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57143859A JPS57143859A JP2969781A JP2969781A JPS57143859A JP S57143859 A JPS57143859 A JP S57143859A JP 2969781 A JP2969781 A JP 2969781A JP 2969781 A JP2969781 A JP 2969781A JP S57143859 A JPS57143859 A JP S57143859A
- Authority
- JP
- Japan
- Prior art keywords
- type
- region
- forming
- base
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 239000012535 impurity Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To prevent the generation of an N channel by forming a P<+> type high concentration impurity region to the surface except an element forming region of a P type Si base body. CONSTITUTION:An N type base region 14 and a P<+> type emitter region 15 are shaped to the P type Si base body 11 manufactured by forming a P type epitaxial layer 13 onto a P<+> type Si substrate 12. The P<+> type high concentration impurity region 16 (the region 16 may be isolated slightly from the base region 14) is molded to the surfaces of other regions. Accordingly, the generation of the N channel in the interface with an Si oxide film 17 can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2969781A JPS57143859A (en) | 1981-03-02 | 1981-03-02 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2969781A JPS57143859A (en) | 1981-03-02 | 1981-03-02 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57143859A true JPS57143859A (en) | 1982-09-06 |
Family
ID=12283295
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2969781A Pending JPS57143859A (en) | 1981-03-02 | 1981-03-02 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57143859A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62145348U (en) * | 1986-03-10 | 1987-09-12 |
-
1981
- 1981-03-02 JP JP2969781A patent/JPS57143859A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62145348U (en) * | 1986-03-10 | 1987-09-12 |
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