JPS5640273A - Semiconductor device and preparation of the same - Google Patents

Semiconductor device and preparation of the same

Info

Publication number
JPS5640273A
JPS5640273A JP11605679A JP11605679A JPS5640273A JP S5640273 A JPS5640273 A JP S5640273A JP 11605679 A JP11605679 A JP 11605679A JP 11605679 A JP11605679 A JP 11605679A JP S5640273 A JPS5640273 A JP S5640273A
Authority
JP
Japan
Prior art keywords
region
type
film
regions
polycrystalline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11605679A
Other languages
Japanese (ja)
Inventor
Isao Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP11605679A priority Critical patent/JPS5640273A/en
Publication of JPS5640273A publication Critical patent/JPS5640273A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H01L21/8226—Bipolar technology comprising merged transistor logic or integrated injection logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain an I<2>L having an excellent current-amplification factor and the like by forming the emitter region of a lateral transistor deep and the collector region of a vertical transistor shallow on the same substrate by diffusion. CONSTITUTION:An SiO2 film 22 is selectively provided on an n<+> type semiconductor substrate 21, and an n<-> type epitaxial layer is grown on the whole surface including the film 22 to produce a polycrystalline Si region 24 and a monocrystalline Si region 23 on the film 22 and the exposed portion of the substrate 21 respectively. Then, an SiO2 film 25 is provided on the whole surface, and a region 26 on the region 24 and a given region 27 of the region 23 are removed. p Type impurities are diffused to produce a shallow p type region 28 in the region 23, and a deep p type region 30 having p type regions 29 extending from both sides in the region 24 by taking advantage of the fast diffusion-speed of the polycrystalline Si. After that, n<+> type regions 321-32n are provided in the region 28. Thus, a lateral pnp element using the region 30 as its emitter and a vertical npn element using the regions 321-32n as its collectors are obtained.
JP11605679A 1979-09-12 1979-09-12 Semiconductor device and preparation of the same Pending JPS5640273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11605679A JPS5640273A (en) 1979-09-12 1979-09-12 Semiconductor device and preparation of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11605679A JPS5640273A (en) 1979-09-12 1979-09-12 Semiconductor device and preparation of the same

Publications (1)

Publication Number Publication Date
JPS5640273A true JPS5640273A (en) 1981-04-16

Family

ID=14677603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11605679A Pending JPS5640273A (en) 1979-09-12 1979-09-12 Semiconductor device and preparation of the same

Country Status (1)

Country Link
JP (1) JPS5640273A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6822301B2 (en) * 2002-07-31 2004-11-23 Infineon Technologies Ag Maskless middle-of-line liner deposition

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52146574A (en) * 1976-05-31 1977-12-06 Sony Corp Semiconductor device
JPS53114358A (en) * 1977-03-01 1978-10-05 Toko Inc Semiconductor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52146574A (en) * 1976-05-31 1977-12-06 Sony Corp Semiconductor device
JPS53114358A (en) * 1977-03-01 1978-10-05 Toko Inc Semiconductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6822301B2 (en) * 2002-07-31 2004-11-23 Infineon Technologies Ag Maskless middle-of-line liner deposition

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