JPS5654063A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5654063A
JPS5654063A JP13064479A JP13064479A JPS5654063A JP S5654063 A JPS5654063 A JP S5654063A JP 13064479 A JP13064479 A JP 13064479A JP 13064479 A JP13064479 A JP 13064479A JP S5654063 A JPS5654063 A JP S5654063A
Authority
JP
Japan
Prior art keywords
type
region
collector
layer
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13064479A
Other languages
Japanese (ja)
Other versions
JPS6225264B2 (en
Inventor
Hiromi Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13064479A priority Critical patent/JPS5654063A/en
Publication of JPS5654063A publication Critical patent/JPS5654063A/en
Publication of JPS6225264B2 publication Critical patent/JPS6225264B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To miniaturize the device while heightening the working speed by utilizing a semiconductor layer resistance low in the concentration of impurities composing the collector region of bipolar transistors as a collector series resistance. CONSTITUTION:An n<+> type implanted collector region 2 is formed by diffusion on a p type Si substrate and surrounded by a p<+> type channel cut layer 3 provided on the surface layer of a substrate 1 which is entirely covered with an SiO2 film 4. Then, a window is etched on the film 4 corresponding to the region 2 to form an n type collector region 5 thereon, in which a p<+> type active base region 6 is formed by diffusion therein and an n<+> type emitter region 8 is provided in the region 6. Thereafter, a p<+> type collector drawing polycrystalline layer 9 is formed in contact with the region 6 positioned on the film 4. Likewise, an n<+> type collector drawing polycrystalline layer 7 is formed positioned on the film 4 through an n<+> type contact layer 19. In this manner, the utilization of a collector layer 5 connected to the layer 7 as collector series resistance unnecessitates additional series resistance.
JP13064479A 1979-10-08 1979-10-08 Semiconductor device Granted JPS5654063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13064479A JPS5654063A (en) 1979-10-08 1979-10-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13064479A JPS5654063A (en) 1979-10-08 1979-10-08 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5654063A true JPS5654063A (en) 1981-05-13
JPS6225264B2 JPS6225264B2 (en) 1987-06-02

Family

ID=15039173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13064479A Granted JPS5654063A (en) 1979-10-08 1979-10-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5654063A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4912538A (en) * 1985-12-20 1990-03-27 Licentia Patent-Verwaltungs Gmbh Structured semiconductor body
JPH0332028A (en) * 1989-06-29 1991-02-12 Mitsubishi Electric Corp Semiconductor integrated circuit device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5476677U (en) * 1977-11-11 1979-05-31

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5476677U (en) * 1977-11-11 1979-05-31

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4912538A (en) * 1985-12-20 1990-03-27 Licentia Patent-Verwaltungs Gmbh Structured semiconductor body
US4935375A (en) * 1985-12-20 1990-06-19 Licentia Patent-Verwaltungs-Gmbh Method of making a semiconductor device
JPH0332028A (en) * 1989-06-29 1991-02-12 Mitsubishi Electric Corp Semiconductor integrated circuit device

Also Published As

Publication number Publication date
JPS6225264B2 (en) 1987-06-02

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