JPS5685847A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS5685847A JPS5685847A JP16154879A JP16154879A JPS5685847A JP S5685847 A JPS5685847 A JP S5685847A JP 16154879 A JP16154879 A JP 16154879A JP 16154879 A JP16154879 A JP 16154879A JP S5685847 A JPS5685847 A JP S5685847A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- region
- mos
- diffused
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0244—I2L structures integrated in combination with analog structures
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To improve the Vth controllability of an MOS by forming a low resistance layer in a lower layer and a high resistance layer in an upper layer as laminated in an epitaxial layer when growing the epitaxial layer on one semiconductor substrate, isolating it into insular state, and using one for an I<2>L element and the other for an MOS element. CONSTITUTION:An n<+> type buried layer 2 is diffused in a p<-> type Si substrate 1, a lower n type layer 3a of low resistance and an upper n<-> type layer 3b of high resistance are laminated and epitaxially grown on the entire surface including the layer 2, and the epitaxial layer is isolated into a layer including the layer 2 and a layer including no layer 2 with a p<+> type region reaching the substrate 1. Subsequently, the epitaxial layer including the layer 2 is used for an I<2>L element, a p<+> type injector region 8, a p type base region 9 and an n<+> type emitter pickup region 13 are respectively diffused therein, and an n<+> type multicollector region 11 is formed in the region 9. The epitaxial layer including no layer 2 is used for an MOS element, and a p type base region 4 and a p type drain region 5 are diffused therein. Thus, the Vth controllability of the MOS can be conducted without decreasing the reverse hFE of the I<2>L.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16154879A JPS5685847A (en) | 1979-12-14 | 1979-12-14 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16154879A JPS5685847A (en) | 1979-12-14 | 1979-12-14 | Semiconductor device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5685847A true JPS5685847A (en) | 1981-07-13 |
Family
ID=15737193
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16154879A Pending JPS5685847A (en) | 1979-12-14 | 1979-12-14 | Semiconductor device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5685847A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH025566A (en) * | 1988-02-12 | 1990-01-10 | Motorola Inc | Integrated circuit and its manufacture |
-
1979
- 1979-12-14 JP JP16154879A patent/JPS5685847A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH025566A (en) * | 1988-02-12 | 1990-01-10 | Motorola Inc | Integrated circuit and its manufacture |
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