JPS5613749A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS5613749A
JPS5613749A JP8952379A JP8952379A JPS5613749A JP S5613749 A JPS5613749 A JP S5613749A JP 8952379 A JP8952379 A JP 8952379A JP 8952379 A JP8952379 A JP 8952379A JP S5613749 A JPS5613749 A JP S5613749A
Authority
JP
Japan
Prior art keywords
film
resist
flowage
deformation
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8952379A
Other languages
Japanese (ja)
Inventor
Masanori Fukumoto
Kazuya Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8952379A priority Critical patent/JPS5613749A/en
Publication of JPS5613749A publication Critical patent/JPS5613749A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Abstract

PURPOSE:To prevent the resist film from deformation and flowage due to heat by irradiating plasma to the positive-resist film formed before a wiring metal film is provided. CONSTITUTION:SiO2 films 14 and 15 are provided on the surface of a semiconductor substrate 13. A portion of the film 15 is selectively removed to provide a step 15'. Then the surfaces of the films 14 and 15 are coated with the positive resist 16 to form a reverse pattern of a wiring pattern. After gas plasma is applied to this, the whole substrate 13 is heated to above 200 deg.C in a vacuum. At this time, the plasma irradiation restrict the deformation and flowage of the film 16 due to a high temperature to be smaller. Being thus heated, the whole surface of the substrate 13 is provided with a wiring metal film 17, and then the film 17 is coated with negative resist 18 to form a wiring pattern. The film 17 is selectively removed by using the resist pattern 18 as a mask. Then the films 16 and 18 are removed. Thus, the deformation and flowage of the resist due to heat can be prevented, so that a micro wiring pattern can be formed, and moreover the step portion can be excellently coated with the wiring metal film.
JP8952379A 1979-07-13 1979-07-13 Preparation of semiconductor device Pending JPS5613749A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8952379A JPS5613749A (en) 1979-07-13 1979-07-13 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8952379A JPS5613749A (en) 1979-07-13 1979-07-13 Preparation of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5613749A true JPS5613749A (en) 1981-02-10

Family

ID=13973157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8952379A Pending JPS5613749A (en) 1979-07-13 1979-07-13 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5613749A (en)

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