JPS5473578A - Pattern exposure method of semiconductor substrate and pattern exposure apparatus - Google Patents

Pattern exposure method of semiconductor substrate and pattern exposure apparatus

Info

Publication number
JPS5473578A
JPS5473578A JP14096577A JP14096577A JPS5473578A JP S5473578 A JPS5473578 A JP S5473578A JP 14096577 A JP14096577 A JP 14096577A JP 14096577 A JP14096577 A JP 14096577A JP S5473578 A JPS5473578 A JP S5473578A
Authority
JP
Japan
Prior art keywords
exposure
substrate
pattern exposure
temperature
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14096577A
Other languages
Japanese (ja)
Inventor
Kazuo Niwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14096577A priority Critical patent/JPS5473578A/en
Publication of JPS5473578A publication Critical patent/JPS5473578A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • G03F7/707—Chucks, e.g. chucking or un-chucking operations or structural details
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/708—Construction of apparatus, e.g. environment aspects, hygiene aspects or materials
    • G03F7/70858—Environment aspects, e.g. pressure of beam-path gas, temperature
    • G03F7/70866—Environment aspects, e.g. pressure of beam-path gas, temperature of mask or workpiece
    • G03F7/70875—Temperature, e.g. temperature control of masks or workpieces via control of stage temperature

Landscapes

  • Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Epidemiology (AREA)
  • Public Health (AREA)
  • Atmospheric Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE: To perorm exposure to photo resist on substrates by setting exposure time arbitrarily without being affected by environmental temperatures at all.
CONSTITUTION: The substrate having been coated with photo resist is placed on a chuck 1 and is fixed by operating a vacuum source 4. A mask is then superposed thereon. The temperature of the liquid ciuculating in conduits 3 is set at an arbitrary temperature by heating or cooling. After the substrate has reached a desired temperature, a light source 6 is lighted to perform exposure. When the substrate is kept at above room temperature, and exposure is performed, photosensitive reaction is promoted and exposure time may be reduced, which may be 1/2 to 1/3 at 80°C. When exposure is performed by maintaining the substrate below room temperature, the phtosensitive reaction is retarded, resulting in reduced rate of emission of N2 gas and improved adhesion between the substrate and mask, thereby enabling the exposure of fine patterns to be accomplished. At 0°C, the evolution of N2 gas becomes extremely small and adhesion defect does not occur.
COPYRIGHT: (C)1979,JPO&Japio
JP14096577A 1977-11-24 1977-11-24 Pattern exposure method of semiconductor substrate and pattern exposure apparatus Pending JPS5473578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14096577A JPS5473578A (en) 1977-11-24 1977-11-24 Pattern exposure method of semiconductor substrate and pattern exposure apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14096577A JPS5473578A (en) 1977-11-24 1977-11-24 Pattern exposure method of semiconductor substrate and pattern exposure apparatus

Publications (1)

Publication Number Publication Date
JPS5473578A true JPS5473578A (en) 1979-06-12

Family

ID=15280928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14096577A Pending JPS5473578A (en) 1977-11-24 1977-11-24 Pattern exposure method of semiconductor substrate and pattern exposure apparatus

Country Status (1)

Country Link
JP (1) JPS5473578A (en)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56112732A (en) * 1980-02-12 1981-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Exposure device
JPS5796529A (en) * 1980-12-09 1982-06-15 Fujitsu Ltd Microwave plasma treating method
JPS57112022A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Mask positioning unit
JPS58176936A (en) * 1982-04-09 1983-10-17 Fujitsu Ltd Substrate cooling method
JPS58178536A (en) * 1982-03-31 1983-10-19 パ−キン−エルマ−・ツエンゾ−ル・アンシュタルト Device for holding working piece
JPS5948925A (en) * 1982-09-14 1984-03-21 Dainippon Screen Mfg Co Ltd Cooling method and apparatus for substrate for applying chemical being heated and dried
JPS5950439U (en) * 1982-09-27 1984-04-03 キヤノン株式会社 semiconductor exposure equipment
JPS5961027A (en) * 1982-09-29 1984-04-07 Toshiba Corp Semiconductor substrate heating apparatus
JPS5974729U (en) * 1982-11-10 1984-05-21 クラリオン株式会社 Sample measuring device
JPS59151441U (en) * 1983-03-29 1984-10-11 横河電機株式会社 semiconductor test equipment
JPS61251134A (en) * 1985-04-30 1986-11-08 Toshiba Corp Automatic developing apparatus
JPS61251135A (en) * 1985-04-30 1986-11-08 Toshiba Corp Automatic developing apparatus
JPS62111425A (en) * 1985-10-28 1987-05-22 Ushio Inc Method for resist treatment
JPS62111424A (en) * 1985-10-28 1987-05-22 Ushio Inc Method for resist treatment
JPS62117323A (en) * 1985-11-18 1987-05-28 Toshiba Corp Automatic developing device
JPS62162330A (en) * 1986-01-13 1987-07-18 Ushio Inc Resist processing
JPS63164194U (en) * 1987-04-15 1988-10-26
JPH0212811A (en) * 1988-06-30 1990-01-17 Ushio Inc Aligning method for wafer periphery
JPH0287518A (en) * 1988-09-26 1990-03-28 Ushio Inc Exposure of wafer periphery
JPH0383322A (en) * 1989-08-28 1991-04-09 Tokyo Electron Ltd Exposure method

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56112732A (en) * 1980-02-12 1981-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Exposure device
JPS5796529A (en) * 1980-12-09 1982-06-15 Fujitsu Ltd Microwave plasma treating method
JPS57112022A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Mask positioning unit
JPS58178536A (en) * 1982-03-31 1983-10-19 パ−キン−エルマ−・ツエンゾ−ル・アンシュタルト Device for holding working piece
JPH0363218B2 (en) * 1982-03-31 1991-09-30 Paakin Erumaa Tsuenzooru Anshutaruto
JPH0313734B2 (en) * 1982-04-09 1991-02-25 Fujitsu Ltd
JPS58176936A (en) * 1982-04-09 1983-10-17 Fujitsu Ltd Substrate cooling method
JPS5948925A (en) * 1982-09-14 1984-03-21 Dainippon Screen Mfg Co Ltd Cooling method and apparatus for substrate for applying chemical being heated and dried
JPS5950439U (en) * 1982-09-27 1984-04-03 キヤノン株式会社 semiconductor exposure equipment
JPS5961027A (en) * 1982-09-29 1984-04-07 Toshiba Corp Semiconductor substrate heating apparatus
JPS6246265Y2 (en) * 1982-11-10 1987-12-12
JPS5974729U (en) * 1982-11-10 1984-05-21 クラリオン株式会社 Sample measuring device
JPS59151441U (en) * 1983-03-29 1984-10-11 横河電機株式会社 semiconductor test equipment
JPS638132Y2 (en) * 1983-03-29 1988-03-10
JPS61251135A (en) * 1985-04-30 1986-11-08 Toshiba Corp Automatic developing apparatus
JPS61251134A (en) * 1985-04-30 1986-11-08 Toshiba Corp Automatic developing apparatus
JPH0431173B2 (en) * 1985-04-30 1992-05-25
JPS62111425A (en) * 1985-10-28 1987-05-22 Ushio Inc Method for resist treatment
JPS62111424A (en) * 1985-10-28 1987-05-22 Ushio Inc Method for resist treatment
JPS62117323A (en) * 1985-11-18 1987-05-28 Toshiba Corp Automatic developing device
JPS62162330A (en) * 1986-01-13 1987-07-18 Ushio Inc Resist processing
JPS63164194U (en) * 1987-04-15 1988-10-26
JPH0419753Y2 (en) * 1987-04-15 1992-05-06
JPH0212811A (en) * 1988-06-30 1990-01-17 Ushio Inc Aligning method for wafer periphery
JPH0750676B2 (en) * 1988-06-30 1995-05-31 ウシオ電機株式会社 Wafer edge exposure method
JPH0287518A (en) * 1988-09-26 1990-03-28 Ushio Inc Exposure of wafer periphery
JPH0750677B2 (en) * 1988-09-26 1995-05-31 ウシオ電機株式会社 Wafer edge exposure method
JPH0383322A (en) * 1989-08-28 1991-04-09 Tokyo Electron Ltd Exposure method

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