JPS5624936A - Etching of semiconductor device - Google Patents

Etching of semiconductor device

Info

Publication number
JPS5624936A
JPS5624936A JP10157979A JP10157979A JPS5624936A JP S5624936 A JPS5624936 A JP S5624936A JP 10157979 A JP10157979 A JP 10157979A JP 10157979 A JP10157979 A JP 10157979A JP S5624936 A JPS5624936 A JP S5624936A
Authority
JP
Japan
Prior art keywords
film
layer
aluminum
entire surface
aluminum layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10157979A
Other languages
Japanese (ja)
Inventor
Hitoshi Teshigahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10157979A priority Critical patent/JPS5624936A/en
Publication of JPS5624936A publication Critical patent/JPS5624936A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To smoothly etch an aluminum layer formed on an Si substrate in the semiconductor device and to eliminate aluminum residue thereon by heat treating the aluminum layer at high temperature when etching the aluminum layer to form a mask film thereon, and pretreating it using fluoric acid prior to the etching process. CONSTITUTION:An SiO2 film 2 is coated on the Si substrate 1, the aluminum layer 3 is evaporated on the entire surface thereof, and is heat treated at high temperature or 450 deg.C for 30min in N2 gas atmosphere. Then, a photoresist film 4 is coated on the entire surface, is exposed with light using a photomask 5, is then developed, and the film 4 is formed into desired pattern. Thereafter, before the layer 3 is etched, the entire surface is pretreated using fluoric acid, and the layer 3 is then etched to form predetermined pattern, and the film 4 is subsequently removed therefrom. In this manner, an Al2O3 film formed on the surface of the layer 3 can be effectively removed, and is not formed on the film 2 exposed with aluminum residue.
JP10157979A 1979-08-06 1979-08-06 Etching of semiconductor device Pending JPS5624936A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10157979A JPS5624936A (en) 1979-08-06 1979-08-06 Etching of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10157979A JPS5624936A (en) 1979-08-06 1979-08-06 Etching of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5624936A true JPS5624936A (en) 1981-03-10

Family

ID=14304295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10157979A Pending JPS5624936A (en) 1979-08-06 1979-08-06 Etching of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5624936A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS498178A (en) * 1972-05-10 1974-01-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS498178A (en) * 1972-05-10 1974-01-24

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