JPS57130432A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57130432A
JPS57130432A JP1549381A JP1549381A JPS57130432A JP S57130432 A JPS57130432 A JP S57130432A JP 1549381 A JP1549381 A JP 1549381A JP 1549381 A JP1549381 A JP 1549381A JP S57130432 A JPS57130432 A JP S57130432A
Authority
JP
Japan
Prior art keywords
film
substrate
organic solvent
photo
vapor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1549381A
Other languages
Japanese (ja)
Inventor
Hiromichi Kono
Tadahiro Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1549381A priority Critical patent/JPS57130432A/en
Publication of JPS57130432A publication Critical patent/JPS57130432A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To increase a close tightness between a substrate and a photo resist and obtain a minute pattern by a small amount of organic solvent by a method wherein vapor of organic solvent has been sprayed against the substrate surface previously when a photo-sensitive film is formed on the semiconductor substrate. CONSTITUTION:An SiO2 film 2 is attached to an Si substrat 1 while the vapor of organic solvent of silane system like organic chlorosilane, hexaalkyldisilazane or the like is sprayed over the entire surface, and a photo resist film 3 is coated thereon by utilizing a spin coating method, etc. Subsequently, on the foregoing structure, a photo mask containing chrome or chrome oxide which is attached selectively onto a glass substrate 4 is positioned to irradiate selectively a violet ray against a substrate 1. Thereafter, the substrate 1 is immersed in the developing toner, a film 3 at the exposure part is molten to remove it and an unexposed part 3a is left. Subsequently, a heat treatment is provided at 120 deg.C for 30min, the exposed portion of the film 2 is removed by etching with etching solution of fluorine system, and further the film 3a is removed with hydrogen plasma to obtain the film 2 having a desired pattern.
JP1549381A 1981-02-04 1981-02-04 Manufacture of semiconductor device Pending JPS57130432A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1549381A JPS57130432A (en) 1981-02-04 1981-02-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1549381A JPS57130432A (en) 1981-02-04 1981-02-04 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57130432A true JPS57130432A (en) 1982-08-12

Family

ID=11890323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1549381A Pending JPS57130432A (en) 1981-02-04 1981-02-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57130432A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4497890A (en) * 1983-04-08 1985-02-05 Motorola, Inc. Process for improving adhesion of resist to gold
US4753866A (en) * 1986-02-24 1988-06-28 Texas Instruments Incorporated Method for processing an interlevel dielectric suitable for VLSI metallization schemes
US5378511A (en) * 1993-03-22 1995-01-03 International Business Machines Corporation Material-saving resist spinner and process
US5449405A (en) * 1991-10-29 1995-09-12 International Business Machines Corporation Material-saving resist spinner and process
US5670210A (en) * 1994-10-27 1997-09-23 Silicon Valley Group, Inc. Method of uniformly coating a substrate
US6977098B2 (en) 1994-10-27 2005-12-20 Asml Holding N.V. Method of uniformly coating a substrate
US7018943B2 (en) 1994-10-27 2006-03-28 Asml Holding N.V. Method of uniformly coating a substrate
US7030039B2 (en) 1994-10-27 2006-04-18 Asml Holding N.V. Method of uniformly coating a substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS493228A (en) * 1972-04-22 1974-01-12
JPS5130890A (en) * 1974-09-10 1976-03-16 Japan Synthetic Rubber Co Ltd Ketsushosei 1 22 horiputajen no seizoho

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS493228A (en) * 1972-04-22 1974-01-12
JPS5130890A (en) * 1974-09-10 1976-03-16 Japan Synthetic Rubber Co Ltd Ketsushosei 1 22 horiputajen no seizoho

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4497890A (en) * 1983-04-08 1985-02-05 Motorola, Inc. Process for improving adhesion of resist to gold
US4753866A (en) * 1986-02-24 1988-06-28 Texas Instruments Incorporated Method for processing an interlevel dielectric suitable for VLSI metallization schemes
US5449405A (en) * 1991-10-29 1995-09-12 International Business Machines Corporation Material-saving resist spinner and process
US5378511A (en) * 1993-03-22 1995-01-03 International Business Machines Corporation Material-saving resist spinner and process
US5670210A (en) * 1994-10-27 1997-09-23 Silicon Valley Group, Inc. Method of uniformly coating a substrate
US6977098B2 (en) 1994-10-27 2005-12-20 Asml Holding N.V. Method of uniformly coating a substrate
US7018943B2 (en) 1994-10-27 2006-03-28 Asml Holding N.V. Method of uniformly coating a substrate
US7030039B2 (en) 1994-10-27 2006-04-18 Asml Holding N.V. Method of uniformly coating a substrate

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