JPS56126941A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56126941A
JPS56126941A JP3030680A JP3030680A JPS56126941A JP S56126941 A JPS56126941 A JP S56126941A JP 3030680 A JP3030680 A JP 3030680A JP 3030680 A JP3030680 A JP 3030680A JP S56126941 A JPS56126941 A JP S56126941A
Authority
JP
Japan
Prior art keywords
poly
layer
thick
sio2
thick film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3030680A
Other languages
Japanese (ja)
Inventor
Hiroshi Nozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3030680A priority Critical patent/JPS56126941A/en
Publication of JPS56126941A publication Critical patent/JPS56126941A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain a semiconductor device with a high reliability having a flat surface by forming an element region surrounded with a conductive thick film poly Si on SiO2 having a thick film portion corresponding to a thick film section of a conductive poly Si stacked on an Si substrate through SiO2. CONSTITUTION:An SiO22 of 1,000Angstrom and P-added poly Si3 about 0.6mum thick and an Si3N4 mask 4 are stacked on an N type Si substrate 1 and an ion is injected thereinto to form a channel stopper 5. Subsequently, oxidation is made so as to leave an SiO26 of about 6,000Angstrom and an unoxidized layer 33 about 0.2mum thick therebeneath. After removal of the mask 4, windows are etched through the layer 3 and the layer 2 to make a gate oxide film 7 which covers the film 7. Thereafter, a gate electrode 8, a source 9, a drain 10 and an offset gate 11 are made of poly Si by a normal method and covered with an SiO212 on which electrodes 14-16 are applied. This facilitates the mounting of the electrode on the poly Si layer. A highly dielectric conversion with the SiO2 thick film can check the formation of an inverted layer while smoothing the surface thereby eliminating disconnection.
JP3030680A 1980-03-12 1980-03-12 Semiconductor device Pending JPS56126941A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3030680A JPS56126941A (en) 1980-03-12 1980-03-12 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3030680A JPS56126941A (en) 1980-03-12 1980-03-12 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56126941A true JPS56126941A (en) 1981-10-05

Family

ID=12300072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3030680A Pending JPS56126941A (en) 1980-03-12 1980-03-12 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56126941A (en)

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