JPS5764966A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5764966A JPS5764966A JP55141317A JP14131780A JPS5764966A JP S5764966 A JPS5764966 A JP S5764966A JP 55141317 A JP55141317 A JP 55141317A JP 14131780 A JP14131780 A JP 14131780A JP S5764966 A JPS5764966 A JP S5764966A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- capacitance
- region
- insulating film
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000010410 layer Substances 0.000 abstract 4
- 239000000758 substrate Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 239000012212 insulator Substances 0.000 abstract 1
- 239000011229 interlayer Substances 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To obtain the capacitance in series to FET for the subject semiconductor device by a method wherein the conductive or semiconductive first region, selectively provided on an Si substrate, is covered by an insulating film, the second region is provided separately from the first region on the substrate located below the gate electrode above the side face and one of the above regions is used as an electrode. CONSTITUTION:A field oxide film 2 and an ion-implanting N-layer 20 are formed on the P type Si substrate 1 using an Si3N4 film as a mask. A gate insulating film 11 (dielectric 15 with capacitance) is newly provided and an N type polycrystalline Si3 having vertical side face is formed. An SiO2 19 is covered on the above, apertures 41 and 42 are selectively provided, an Si layer 5 is superposed by selecting the density of impurities and conductive type, a gate electrode 6 and a lead 9 are formed by performing a vertical etching selectively and an N type source 13 is formed by performing an ion implantation. According to this constitution, the mu channel FET which was separated by an electrode 6 is formed by layers 3, 13 and 14, a capacitance in series to the FET having the electrode 14 is provided, with the N-layer a an opposing electrode, through the intermediary of an insulating film 15, an interlayer insulator 25 is provided and a lead 10 is attached.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55141317A JPS5764966A (en) | 1980-10-08 | 1980-10-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55141317A JPS5764966A (en) | 1980-10-08 | 1980-10-08 | Semiconductor device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2064884A Division JPH02290063A (en) | 1990-03-15 | 1990-03-15 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5764966A true JPS5764966A (en) | 1982-04-20 |
| JPH0237107B2 JPH0237107B2 (en) | 1990-08-22 |
Family
ID=15289092
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55141317A Granted JPS5764966A (en) | 1980-10-08 | 1980-10-08 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5764966A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022363A (en) * | 1983-07-19 | 1985-02-04 | Toshiba Corp | Manufacture of mis dynamic memory cell |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DK39889A (en) * | 1989-01-30 | 1990-07-31 | Edward Hugh Mcquiston Halgreen | WASTE SORTING EQUIPMENT |
-
1980
- 1980-10-08 JP JP55141317A patent/JPS5764966A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022363A (en) * | 1983-07-19 | 1985-02-04 | Toshiba Corp | Manufacture of mis dynamic memory cell |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0237107B2 (en) | 1990-08-22 |
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