JPS5764967A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5764967A JPS5764967A JP55141318A JP14131880A JPS5764967A JP S5764967 A JPS5764967 A JP S5764967A JP 55141318 A JP55141318 A JP 55141318A JP 14131880 A JP14131880 A JP 14131880A JP S5764967 A JPS5764967 A JP S5764967A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- region
- type
- semiconductor
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To obtain the capacitance connected in series to a short-channel FET for the subject semiconductor device by a method wherein the first region, on which a semiconductor or conductor was selectively provided directly and through the intermediary of an insulating film, is formed on a semiconductor substrate and the second semiconductor region is formed below the gate electrode provided on the insulating film on the side face of the first region, with an interval first region. CONSTITUTION:A field oxide film 2 and an N type ion-implanting layer 20 are formed on a P type Si substrate 1 using an Si3N4 as a mask, a gate insulating film 11 (dielectric 15 for capacitance) is newly provided and an N type polycrystalline Si3 having vertical side face is selectively formed. An SiO2 19 is covered on the above, apertures 41 and 42 are provided and an Si layer 5 is superposed by selecting a conductive type and the density of impurities. A gate electrode 6 and a lead 9 are provided by performing a vertical etching selectively and when an N type source 13 is formed by ion implantation, an IGFET having a short channel 12 can be obtained, and a series capacitance having an opposed electrode N-layer 3 is formed using a drain 14 as an electrode and through the intermediary of an insulating film 15.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55141318A JPS5764967A (en) | 1980-10-08 | 1980-10-08 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55141318A JPS5764967A (en) | 1980-10-08 | 1980-10-08 | Semiconductor device |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58125720A Division JPS5925266A (en) | 1983-07-11 | 1983-07-11 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5764967A true JPS5764967A (en) | 1982-04-20 |
JPH0234171B2 JPH0234171B2 (en) | 1990-08-01 |
Family
ID=15289116
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55141318A Granted JPS5764967A (en) | 1980-10-08 | 1980-10-08 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5764967A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61131484A (en) * | 1984-11-29 | 1986-06-19 | Res Dev Corp Of Japan | Semiconductor nonvolatile memory |
-
1980
- 1980-10-08 JP JP55141318A patent/JPS5764967A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61131484A (en) * | 1984-11-29 | 1986-06-19 | Res Dev Corp Of Japan | Semiconductor nonvolatile memory |
Also Published As
Publication number | Publication date |
---|---|
JPH0234171B2 (en) | 1990-08-01 |
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