JPS56150864A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56150864A
JPS56150864A JP5350480A JP5350480A JPS56150864A JP S56150864 A JPS56150864 A JP S56150864A JP 5350480 A JP5350480 A JP 5350480A JP 5350480 A JP5350480 A JP 5350480A JP S56150864 A JPS56150864 A JP S56150864A
Authority
JP
Japan
Prior art keywords
forming
polysilicon
electrode
film
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5350480A
Other languages
Japanese (ja)
Inventor
Yoshihisa Mizutani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP5350480A priority Critical patent/JPS56150864A/en
Publication of JPS56150864A publication Critical patent/JPS56150864A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221Three dimensional integrated circuits stacked in different levels

Abstract

PURPOSE:To enable the increase of the integration of a semiconductor device by forming an MISFET on a gate electrode to surround the electrode with an insulating layer and forming by laminating an element connected to the FET, thereby forming, for example, an inverter circuit in a smooth structure. CONSTITUTION:A polysilicon is accumulated on a substrate 1 on which an oxidized film 2 is formed, and the part of a gate electrode 31 is covered with a nitrided film mask 4, thereby forming an oxidized film 32 of the polysilicon. After the mask 4 is then removed and a gate film 5 is formed on the surface of the electrode 31, ions are injected to allow the gate electrode 31 to become conductive. A polysilicon 6 is accumulated on the smoothened surface, ions are then injected to form a source 8 and a drain 9, and an FET is thus formed. After a polysilicon resistor 121 having, for example, an n<+> type terminal parts 14, 15 is formed through an oxidized film 10 opened with a window 11 on the upper surface, an aluminum electrode 17 is formed to form an inverter circuit. Thus, a structure in which elements are laminated can smoothly formed, and its microminiaturization can be readily performed. Accordingly, an MIS circuit can be highly integrated.
JP5350480A 1980-04-24 1980-04-24 Semiconductor device Pending JPS56150864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5350480A JPS56150864A (en) 1980-04-24 1980-04-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5350480A JPS56150864A (en) 1980-04-24 1980-04-24 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56150864A true JPS56150864A (en) 1981-11-21

Family

ID=12944649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5350480A Pending JPS56150864A (en) 1980-04-24 1980-04-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56150864A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4570175A (en) * 1982-06-22 1986-02-11 Hitachi, Ltd. Three-dimensional semiconductor device with thin film monocrystalline member contacting substrate at a plurality of locations
US4876582A (en) * 1983-05-02 1989-10-24 Ncr Corporation Crystallized silicon-on-insulator nonvolatile memory device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503787A (en) * 1973-05-16 1975-01-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503787A (en) * 1973-05-16 1975-01-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4570175A (en) * 1982-06-22 1986-02-11 Hitachi, Ltd. Three-dimensional semiconductor device with thin film monocrystalline member contacting substrate at a plurality of locations
US4876582A (en) * 1983-05-02 1989-10-24 Ncr Corporation Crystallized silicon-on-insulator nonvolatile memory device

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