JPS6425475A - Mos type semiconductor device - Google Patents

Mos type semiconductor device

Info

Publication number
JPS6425475A
JPS6425475A JP62181491A JP18149187A JPS6425475A JP S6425475 A JPS6425475 A JP S6425475A JP 62181491 A JP62181491 A JP 62181491A JP 18149187 A JP18149187 A JP 18149187A JP S6425475 A JPS6425475 A JP S6425475A
Authority
JP
Japan
Prior art keywords
polysilicon
gate
film
oxide film
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62181491A
Other languages
Japanese (ja)
Inventor
Takeya Ezaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62181491A priority Critical patent/JPS6425475A/en
Publication of JPS6425475A publication Critical patent/JPS6425475A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the breakdown strength of a polysilicon from decreasing by forming a 3-layer structure with a silicon nitride film between high melting point metal or its silicide and a polysilicon in contact with a gate oxide film, and forming a polysilicon on the sidewall of a gate for connecting therebetween. CONSTITUTION:A main gate 31 made of polysilicon 3, Si3N4 film 4 and a TiSi2 film 5 is formed through a first gate oxide film 21 on a P-type Si substrate 1, and the end of the polysilicon 3 is brought into contact with a sub gate 32 of polysilicon except that the lower part is partly covered with an oxide film 23. The gate 32 is disposed through a second gate oxide film 22 on low concentration source, drain 61, 72 to electrically connect the film 5 to the polysilicon Si3. That is, the gate 32 is of a conductive path for propagating an electric signal applied externally to the film 5 of the main gate to the polysilicon Si3 of the lower layer, and of a gate electrode for controlling the surface state of an N<-> type region.
JP62181491A 1987-07-21 1987-07-21 Mos type semiconductor device Pending JPS6425475A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62181491A JPS6425475A (en) 1987-07-21 1987-07-21 Mos type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62181491A JPS6425475A (en) 1987-07-21 1987-07-21 Mos type semiconductor device

Publications (1)

Publication Number Publication Date
JPS6425475A true JPS6425475A (en) 1989-01-27

Family

ID=16101687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62181491A Pending JPS6425475A (en) 1987-07-21 1987-07-21 Mos type semiconductor device

Country Status (1)

Country Link
JP (1) JPS6425475A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5306655A (en) * 1990-07-24 1994-04-26 Matsushita Electric Industrial Co., Ltd. Structure and method of manufacture for MOS field effect transistor having lightly doped drain and source diffusion regions
US5621236A (en) * 1991-05-23 1997-04-15 Samsung Electronics Co., Ltd. Gate-to-drain overlapped MOS transistor fabrication process and structure thereby
KR100351441B1 (en) * 1998-06-08 2002-12-18 주식회사 하이닉스반도체 Method for forming transistor of semiconductor
KR100362190B1 (en) * 1995-12-16 2003-03-06 주식회사 하이닉스반도체 Method for forming polycide electrode

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5306655A (en) * 1990-07-24 1994-04-26 Matsushita Electric Industrial Co., Ltd. Structure and method of manufacture for MOS field effect transistor having lightly doped drain and source diffusion regions
US5621236A (en) * 1991-05-23 1997-04-15 Samsung Electronics Co., Ltd. Gate-to-drain overlapped MOS transistor fabrication process and structure thereby
KR100362190B1 (en) * 1995-12-16 2003-03-06 주식회사 하이닉스반도체 Method for forming polycide electrode
KR100351441B1 (en) * 1998-06-08 2002-12-18 주식회사 하이닉스반도체 Method for forming transistor of semiconductor

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