JPS55160456A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS55160456A
JPS55160456A JP7140480A JP7140480A JPS55160456A JP S55160456 A JPS55160456 A JP S55160456A JP 7140480 A JP7140480 A JP 7140480A JP 7140480 A JP7140480 A JP 7140480A JP S55160456 A JPS55160456 A JP S55160456A
Authority
JP
Japan
Prior art keywords
polysilicon
resistor
impurity
flop
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7140480A
Other languages
Japanese (ja)
Other versions
JPS5723423B2 (en
Inventor
Shinji Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7140480A priority Critical patent/JPS55160456A/en
Publication of JPS55160456A publication Critical patent/JPS55160456A/en
Publication of JPS5723423B2 publication Critical patent/JPS5723423B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a flip-flop having high integrating degree by connecting both ends of a polysilicon resistor to polysilicon wires having high impurity density and further connecting one end thereof to a diffused layer in the semiconductor substrate. CONSTITUTION:An SiO2 film 2 and a gate insulating film 2' are formed on an Si substrate 1 to form a polysilicon. After the polysilicon is patterned, impurity is simultaneously introduced selectively when forming source and drain diffused layers 3 to form gate electrode 4 and wires 4'. Then, ion is implanted to introduce impurity in low density to selectively form a high resistor 4'' having 10-100GOMEGA. When flip-flop is formed with the resistor as a load, it has extremely low power consumption and very small occupying area to cause high integrating degree.
JP7140480A 1980-05-30 1980-05-30 Semiconductor device Granted JPS55160456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7140480A JPS55160456A (en) 1980-05-30 1980-05-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7140480A JPS55160456A (en) 1980-05-30 1980-05-30 Semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP48060879A Division JPS584459B2 (en) 1973-06-01 1973-06-01 flip-flop circuit device

Publications (2)

Publication Number Publication Date
JPS55160456A true JPS55160456A (en) 1980-12-13
JPS5723423B2 JPS5723423B2 (en) 1982-05-18

Family

ID=13459534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7140480A Granted JPS55160456A (en) 1980-05-30 1980-05-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS55160456A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022661A (en) * 1988-06-17 1990-01-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit device and manufacture thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3519901A (en) * 1968-01-29 1970-07-07 Texas Instruments Inc Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation
US3576478A (en) * 1969-07-22 1971-04-27 Philco Ford Corp Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode
JPS5132378U (en) * 1974-09-02 1976-03-09

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3519901A (en) * 1968-01-29 1970-07-07 Texas Instruments Inc Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation
US3576478A (en) * 1969-07-22 1971-04-27 Philco Ford Corp Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode
JPS5132378U (en) * 1974-09-02 1976-03-09

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022661A (en) * 1988-06-17 1990-01-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit device and manufacture thereof

Also Published As

Publication number Publication date
JPS5723423B2 (en) 1982-05-18

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