JPS5494281A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5494281A
JPS5494281A JP88778A JP88778A JPS5494281A JP S5494281 A JPS5494281 A JP S5494281A JP 88778 A JP88778 A JP 88778A JP 88778 A JP88778 A JP 88778A JP S5494281 A JPS5494281 A JP S5494281A
Authority
JP
Japan
Prior art keywords
sio
openings
ions
substrate
tapered faces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP88778A
Other languages
Japanese (ja)
Inventor
Masaharu Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP88778A priority Critical patent/JPS5494281A/en
Publication of JPS5494281A publication Critical patent/JPS5494281A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To form good tapered faces and prevent step cutting of wirings by removing sharp opening end serrated parts through ion implantation.
CONSTITUTION: When the SiO2 12 on a Si substrate 1 is opened 12a, overhangs are produced, following to which SiO2 12' is created on the hole bottom. Next, ions are implanted by using a resist mask 13 having openings larger than the openings 12a, allowing the ions to arrive at the boundary face with the substrate. Next, when a SiO2 layer 22 is etched, the ion implanted portions are selectively removed owing to differences in the rate of etching, whereby the openings with mildly tapered faces are formed. Providing wiring 14 thereon obviates the occurrence of disconnection.
COPYRIGHT: (C)1979,JPO&Japio
JP88778A 1978-01-10 1978-01-10 Production of semiconductor device Pending JPS5494281A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP88778A JPS5494281A (en) 1978-01-10 1978-01-10 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP88778A JPS5494281A (en) 1978-01-10 1978-01-10 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5494281A true JPS5494281A (en) 1979-07-25

Family

ID=11486176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP88778A Pending JPS5494281A (en) 1978-01-10 1978-01-10 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5494281A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54142077A (en) * 1978-04-27 1979-11-05 Fujitsu Ltd Manufacture of semiconductor device
KR100247481B1 (en) * 1996-11-26 2000-03-15 김영환 A method for forming metal contact in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54142077A (en) * 1978-04-27 1979-11-05 Fujitsu Ltd Manufacture of semiconductor device
KR100247481B1 (en) * 1996-11-26 2000-03-15 김영환 A method for forming metal contact in semiconductor device

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