JPS5489594A - Manufacture for integrated circuit - Google Patents

Manufacture for integrated circuit

Info

Publication number
JPS5489594A
JPS5489594A JP15885277A JP15885277A JPS5489594A JP S5489594 A JPS5489594 A JP S5489594A JP 15885277 A JP15885277 A JP 15885277A JP 15885277 A JP15885277 A JP 15885277A JP S5489594 A JPS5489594 A JP S5489594A
Authority
JP
Japan
Prior art keywords
film
region
diffusion
sio
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15885277A
Other languages
Japanese (ja)
Inventor
Osamu Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15885277A priority Critical patent/JPS5489594A/en
Publication of JPS5489594A publication Critical patent/JPS5489594A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase the degree of integration and also to improve the yield rate, by providing all the openings required for the wiring formation with the self-alignment method using the acid proof material such as Si3N4, when the polycrystal Si film is constituted with IGFET used for the gate electrode material.
CONSTITUTION: The active region of P type Si substrate 101 is oxidized under water vapor by covering it with the Si3N4 film 103, and thick field SiO2 film 102 is caused other than the active region. Next, the film 103 for the other part is removed by leaving a part of the film 103 used for diffusion, and the gate SiO2 film 104, polycrystal Si film 105 and Si3N4 film are laminated and coated on the entire surface. After that, the film 106 is left only on the gate region and the film 102, and the film 104 and 105 on the diffusion region 107 are removed by etching. Further, the region 107 is formed by diffusion N type impurity in the substrate 101 exposed, the entire surface is covered with the SiO2 film 108, and the wiring electrode 109 is fitted by opening the open hole.
COPYRIGHT: (C)1979,JPO&Japio
JP15885277A 1977-12-27 1977-12-27 Manufacture for integrated circuit Pending JPS5489594A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15885277A JPS5489594A (en) 1977-12-27 1977-12-27 Manufacture for integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15885277A JPS5489594A (en) 1977-12-27 1977-12-27 Manufacture for integrated circuit

Publications (1)

Publication Number Publication Date
JPS5489594A true JPS5489594A (en) 1979-07-16

Family

ID=15680811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15885277A Pending JPS5489594A (en) 1977-12-27 1977-12-27 Manufacture for integrated circuit

Country Status (1)

Country Link
JP (1) JPS5489594A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157369U (en) * 1980-04-25 1981-11-24
JPS61102047A (en) * 1984-10-25 1986-05-20 Nec Corp Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51112193A (en) * 1975-03-28 1976-10-04 Matsushita Electric Ind Co Ltd Processing method of semiconductor equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51112193A (en) * 1975-03-28 1976-10-04 Matsushita Electric Ind Co Ltd Processing method of semiconductor equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157369U (en) * 1980-04-25 1981-11-24
JPS61102047A (en) * 1984-10-25 1986-05-20 Nec Corp Semiconductor device

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