JPS57157546A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS57157546A JPS57157546A JP4295881A JP4295881A JPS57157546A JP S57157546 A JPS57157546 A JP S57157546A JP 4295881 A JP4295881 A JP 4295881A JP 4295881 A JP4295881 A JP 4295881A JP S57157546 A JPS57157546 A JP S57157546A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- film
- layer
- polycrystal
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 238000001020 plasma etching Methods 0.000 abstract 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 2
- 229960002050 hydrofluoric acid Drugs 0.000 abstract 2
- 238000010438 heat treatment Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To form a taper at the stepped section of a hole, and to prevent the disconnection of an Al wiring layer shaped to the taper by jointly using etching employing fluoric acid and plasma etching when a PSG layer and a polycrystal Si layer functioning as a gate electrode are laminated onto the electrode section of an MOS type IC and the hole is bored to the electrode section. CONSTITUTION:The PSG layer 2 and the polycrystal Si layer 5 functioning as the gate electrode are laminated and formed onto the electrode section 1 of the MOS type IC, and the surface is coated with a photo-resist film 6 with a predetermined hole. The Si layer 5 is etched by using fluoric acid weakened, and the hole larger than the hole of the film 6 is formed through etching in the lateral direction. The hole with the same size as the hole of the film 6 is bored to the PSG film 2 through plasma etching while leaving the film 6, the film 6 is removed, the thickness of the film 2 is thinned in response to the large hole through second plasma etching, and the stepped section is shaped to the hole of the film 2. The stepped section is smoothed through heat treatment, a polycrystal Si layer 3 is grown on the whole surface, and the layer 3 is coated with the Al wiring layer 4.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4295881A JPS57157546A (en) | 1981-03-24 | 1981-03-24 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4295881A JPS57157546A (en) | 1981-03-24 | 1981-03-24 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57157546A true JPS57157546A (en) | 1982-09-29 |
Family
ID=12650528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4295881A Pending JPS57157546A (en) | 1981-03-24 | 1981-03-24 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57157546A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0259098A2 (en) * | 1986-09-04 | 1988-03-09 | AT&T Corp. | Integrated circuits having stepped dielectric regions |
JPH04287347A (en) * | 1990-11-21 | 1992-10-12 | Hyundai Electron Ind Co Ltd | Connection device of semiconductor integrated circuit and manufacture thereof |
-
1981
- 1981-03-24 JP JP4295881A patent/JPS57157546A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0259098A2 (en) * | 1986-09-04 | 1988-03-09 | AT&T Corp. | Integrated circuits having stepped dielectric regions |
JPH04287347A (en) * | 1990-11-21 | 1992-10-12 | Hyundai Electron Ind Co Ltd | Connection device of semiconductor integrated circuit and manufacture thereof |
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