JPS5314560A - Production of semiconductor device - Google Patents
Production of semiconductor deviceInfo
- Publication number
- JPS5314560A JPS5314560A JP8940476A JP8940476A JPS5314560A JP S5314560 A JPS5314560 A JP S5314560A JP 8940476 A JP8940476 A JP 8940476A JP 8940476 A JP8940476 A JP 8940476A JP S5314560 A JPS5314560 A JP S5314560A
- Authority
- JP
- Japan
- Prior art keywords
- production
- semiconductor device
- forming
- grooves
- evade
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Wire Bonding (AREA)
Abstract
PURPOSE: To employ simultaneous bonding and evade shorting faults between internal leads and chips by forming dicing grooves then forming a surface protecting film over the entire surface so as to cover the grooves as well.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8940476A JPS5314560A (en) | 1976-07-26 | 1976-07-26 | Production of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8940476A JPS5314560A (en) | 1976-07-26 | 1976-07-26 | Production of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5314560A true JPS5314560A (en) | 1978-02-09 |
Family
ID=13969693
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8940476A Pending JPS5314560A (en) | 1976-07-26 | 1976-07-26 | Production of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5314560A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04236434A (en) * | 1991-01-21 | 1992-08-25 | Toshiba Corp | Semiconductor device and manufacture thereof |
US5691248A (en) * | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
US5705425A (en) * | 1992-05-28 | 1998-01-06 | Fujitsu Limited | Process for manufacturing semiconductor devices separated by an air-bridge |
-
1976
- 1976-07-26 JP JP8940476A patent/JPS5314560A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04236434A (en) * | 1991-01-21 | 1992-08-25 | Toshiba Corp | Semiconductor device and manufacture thereof |
US5705425A (en) * | 1992-05-28 | 1998-01-06 | Fujitsu Limited | Process for manufacturing semiconductor devices separated by an air-bridge |
US5691248A (en) * | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
US5925924A (en) * | 1995-07-26 | 1999-07-20 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
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