JPS4999477A - - Google Patents

Info

Publication number
JPS4999477A
JPS4999477A JP48105860A JP10586073A JPS4999477A JP S4999477 A JPS4999477 A JP S4999477A JP 48105860 A JP48105860 A JP 48105860A JP 10586073 A JP10586073 A JP 10586073A JP S4999477 A JPS4999477 A JP S4999477A
Authority
JP
Japan
Prior art keywords
interconnect pattern
film
lead frame
external lead
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP48105860A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5751732B2 (enExample
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4999477A publication Critical patent/JPS4999477A/ja
Publication of JPS5751732B2 publication Critical patent/JPS5751732B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0446—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/438—Shapes or dispositions of side rails, e.g. having holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/453—Leadframes comprising flexible metallic tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/468—Circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/077—Connecting of TAB connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07336—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP48105860A 1973-01-02 1973-09-19 Expired JPS5751732B2 (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US320349A US3859718A (en) 1973-01-02 1973-01-02 Method and apparatus for the assembly of semiconductor devices

Publications (2)

Publication Number Publication Date
JPS4999477A true JPS4999477A (enExample) 1974-09-19
JPS5751732B2 JPS5751732B2 (enExample) 1982-11-04

Family

ID=23246002

Family Applications (2)

Application Number Title Priority Date Filing Date
JP48105860A Expired JPS5751732B2 (enExample) 1973-01-02 1973-09-19
JP57037882A Pending JPS57164556A (en) 1973-01-02 1982-03-10 Semiconductor integrated circuit assembly

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP57037882A Pending JPS57164556A (en) 1973-01-02 1982-03-10 Semiconductor integrated circuit assembly

Country Status (14)

Country Link
US (1) US3859718A (enExample)
JP (2) JPS5751732B2 (enExample)
KR (1) KR780000595B1 (enExample)
BR (1) BR7309074D0 (enExample)
CA (1) CA1086430A (enExample)
DD (1) DD107812A5 (enExample)
DE (1) DE2363833C2 (enExample)
FR (1) FR2212642B1 (enExample)
GB (1) GB1447524A (enExample)
HU (1) HU167861B (enExample)
IT (1) IT991996B (enExample)
PH (1) PH9927A (enExample)
PL (1) PL87007B1 (enExample)
RO (1) RO64695A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229345A (ja) * 1984-04-27 1985-11-14 Toshiba Corp 半導体装置

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3949925A (en) * 1974-10-03 1976-04-13 The Jade Corporation Outer lead bonder
CA1052912A (en) * 1975-07-07 1979-04-17 National Semiconductor Corporation Gang bonding interconnect tape for semiconductive devices and method of making same
US4099660A (en) * 1975-10-31 1978-07-11 National Semiconductor Corporation Apparatus for and method of shaping interconnect leads
US4166562A (en) * 1977-09-01 1979-09-04 The Jade Corporation Assembly system for microcomponent devices such as semiconductor devices
US4330790A (en) * 1980-03-24 1982-05-18 National Semiconductor Corporation Tape operated semiconductor device packaging
EP0064496A1 (en) * 1980-11-07 1982-11-17 Mostek Corporation Multiple terminal two conductor layer burn-in tape
US4331831A (en) * 1980-11-28 1982-05-25 Bell Telephone Laboratories, Incorporated Package for semiconductor integrated circuits
US4409733A (en) * 1981-01-26 1983-10-18 Integrated Machine Development Means and method for processing integrated circuit element
JPS5922386A (ja) * 1982-07-07 1984-02-04 アルカテル・エヌ・ブイ 電子部品構造体
US4754912A (en) * 1984-04-05 1988-07-05 National Semiconductor Corporation Controlled collapse thermocompression gang bonding
DE3686990T2 (de) * 1985-08-23 1993-04-22 Nippon Electric Co Verfahren zum herstellen einer halbleiteranordnung wobei ein filmtraegerband angewendet wird.
FR2590052B1 (fr) * 1985-11-08 1991-03-01 Eurotechnique Sa Procede de recyclage d'une carte comportant un composant, carte prevue pour etre recyclee
US5038453A (en) * 1988-07-22 1991-08-13 Rohm Co., Ltd. Method of manufacturing semiconductor devices, and leadframe and differential overlapping apparatus therefor
US4985988A (en) * 1989-11-03 1991-01-22 Motorola, Inc. Method for assembling, testing, and packaging integrated circuits
US5528397A (en) * 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
US6087195A (en) 1998-10-15 2000-07-11 Handy & Harman Method and system for manufacturing lamp tiles
JP5167779B2 (ja) * 2007-11-16 2013-03-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US20160056095A1 (en) * 2014-08-25 2016-02-25 Infineon Technologies Ag Leadframe Strip with Sawing Enhancement Feature

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method
US3442432A (en) * 1967-06-15 1969-05-06 Western Electric Co Bonding a beam-leaded device to a substrate
US3689991A (en) * 1968-03-01 1972-09-12 Gen Electric A method of manufacturing a semiconductor device utilizing a flexible carrier
US3698074A (en) * 1970-06-29 1972-10-17 Motorola Inc Contact bonding and packaging of integrated circuits
US3698073A (en) * 1970-10-13 1972-10-17 Motorola Inc Contact bonding and packaging of integrated circuits
US3793714A (en) * 1971-05-27 1974-02-26 Texas Instruments Inc Integrated circuit assembly using etched metal patterns of flexible insulating film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229345A (ja) * 1984-04-27 1985-11-14 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
GB1447524A (en) 1976-08-25
HU167861B (enExample) 1975-12-25
CA1086430A (en) 1980-09-23
DE2363833A1 (de) 1974-07-04
RO64695A (ro) 1980-06-15
PH9927A (en) 1976-06-14
DE2363833C2 (de) 1987-01-22
BR7309074D0 (pt) 1974-10-22
FR2212642A1 (enExample) 1974-07-26
JPS57164556A (en) 1982-10-09
FR2212642B1 (enExample) 1978-11-10
US3859718A (en) 1975-01-14
IT991996B (it) 1975-08-30
JPS5751732B2 (enExample) 1982-11-04
PL87007B1 (enExample) 1976-06-30
DD107812A5 (enExample) 1974-08-12
KR780000595B1 (en) 1978-11-23

Similar Documents

Publication Publication Date Title
FR2212642B1 (enExample)
CA1017071A (en) Plastic power semiconductor flip chip package
SE219304C1 (sv) Förfarande för framställning av en elektrisk kontakt på en oxidöverdragen halvledarskiva jämte enligt sättet framställd kontakt
CA951024A (en) Packaging structure having cooling means for a multiplicity of hermetic modules for integrated circuit chips
KR780000596B1 (en) Method of ball bonding with an autometic semiconductor bonding machine
GB1288983A (enExample)
JPS52101967A (en) Semiconductor device
CA1021066A (en) Semiconductor chip interconnect package
MY8000121A (en) Improvements in or relating to bonding a small object to a substrate
JPS5514506A (en) Bubble memory plane
GB1189904A (en) Process for Encapsulating Electronic Devices in Plastics and Devices so Produced
JPS54152966A (en) Manufacture of semiconductor integrated-circuit device
JPS6455291A (en) Integrated circuit device
JPS533165A (en) Wire bonding apparatus
NL7606781A (nl) Halfgeleiderinrichting.
CA982279A (en) Semiconductor chip bonding tape and method
JPS51138179A (en) Semi-conductor device
JPS55138241A (en) Sealing structure for semiconductor device
JPS5215255A (en) Integrated semiconductor logical circuit
JPS5753371A (en) Tape carrier of thermal head and manufacture thereof
JPS5324270A (en) Semiconductor device
JPS5370766A (en) Semiconductor device
JPS5313874A (en) Production of semiconductor device
JPS55103752A (en) Electronic component
JPS5637662A (en) Semiconductor device