JPS5637662A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5637662A
JPS5637662A JP11289079A JP11289079A JPS5637662A JP S5637662 A JPS5637662 A JP S5637662A JP 11289079 A JP11289079 A JP 11289079A JP 11289079 A JP11289079 A JP 11289079A JP S5637662 A JPS5637662 A JP S5637662A
Authority
JP
Japan
Prior art keywords
lead wire
semiconductor device
wire groups
tab
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11289079A
Other languages
Japanese (ja)
Inventor
Minoru Imai
Shigeo Kubo
Yoshiaki Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11289079A priority Critical patent/JPS5637662A/en
Publication of JPS5637662A publication Critical patent/JPS5637662A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074—Stacked arrangements of non-apertured devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To eliminate the temperature drift and displacement of a pair of lead wire groups and to reduce the size of a semiconductor device of two chip and one package type by bonding a pair of lead wire groups of approximately equal shape through an adhesive layer having an insulating property in a back-to-back manner when forming the semiconductor device. CONSTITUTION:First lead wire group 31 is formed of a tab 311 and a plurality of lead wire pieces 312 formed on one plane surface, and second lead wire group 32 is similarly formed of a tab 321 and a plurality of lead wire pieces 322. Then, semiconductor chips 34, 35 such as transistors or the like are secured on these tabs 311, 322 respectively, and are connected as predetermined with bonding wires 36, 37 respectively. Thereafter, these lead wire groups 31, 32 are bonded in a back-to-back manner using an insulating adhesive layer 33 while directing the chips 34, 35 outwardly, and the entirety is molded with resin 38. Thus, the thermal transfer difference between the lead wire groups 31 and 32 may become at minimum, and an unbalance therebetween due to the temperature drift can be eliminated.
JP11289079A 1979-09-05 1979-09-05 Semiconductor device Pending JPS5637662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11289079A JPS5637662A (en) 1979-09-05 1979-09-05 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11289079A JPS5637662A (en) 1979-09-05 1979-09-05 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5637662A true JPS5637662A (en) 1981-04-11

Family

ID=14598070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11289079A Pending JPS5637662A (en) 1979-09-05 1979-09-05 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5637662A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61115341A (en) * 1984-11-09 1986-06-02 Mitsubishi Electric Corp Semiconductor device
EP1119037A3 (en) * 1996-08-20 2001-10-10 Hitachi, Ltd. Semiconductor device and method of manufacturing thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61115341A (en) * 1984-11-09 1986-06-02 Mitsubishi Electric Corp Semiconductor device
EP1119037A3 (en) * 1996-08-20 2001-10-10 Hitachi, Ltd. Semiconductor device and method of manufacturing thereof

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