CA1052912A - Gang bonding interconnect tape for semiconductive devices and method of making same - Google Patents

Gang bonding interconnect tape for semiconductive devices and method of making same

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Publication number
CA1052912A
CA1052912A CA250,139A CA250139A CA1052912A CA 1052912 A CA1052912 A CA 1052912A CA 250139 A CA250139 A CA 250139A CA 1052912 A CA1052912 A CA 1052912A
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Canada
Prior art keywords
row
tape
patterns
interconnect
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA250,139A
Other languages
French (fr)
Inventor
Carmen D. Burns
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
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Filing date
Publication date
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Application granted granted Critical
Publication of CA1052912A publication Critical patent/CA1052912A/en
Expired legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839—Assembly of a flat lead with an insulating support, e.g. for TAB
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01021—Scandium [Sc]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

Application for Patent of CARMEN D. BURNS
for GANG BONDING INTERCONNECT TAPE FOR SEMICONDUCTIVE
DEVICES AND METHOD OF MAKING SAME

ABSTRACT OF THE DISCLOSURE
A gang bonding interconnect tape, for use in an automatic bonding machine for gang bonding of semiconductive devices, is fabricated by forming a row of first locator holes along the marginal side edge of an elongated master tape. Next the master tape is coated with a photoresist coating and exposed, through a mask, to patterns of optical radiation to which the photo-resist is sensitive. The mask is indexed to the locator holes in the master tape. The mask includes patterns corresponding to parallel rows of interconnect lead patterns and to parallel rows of sprocket holes for locating each of the individual interconnect lead patterns in the gang bonding machine. The exposed master tape is then developed, the photoresist material removed to expose the tape material in accordance with the developed images. The exposed tape is then etched to form the parallel rows of metallic interconnect lead patterns and their respective parallel rows of sprocket holes. The master tape is then slit into a plurality of tapes. Each resultant tape has a row of virgin sprocket holes and a row of interconnect lead patterns. In this process, the sprocket holes for each resultant tape arc indexed to the respective interconnect lead patterns via the mask, whereas the mask is indexed to the tape via the first locator holes formed along the marginal side edges of the master tape. The resultant tapes arc utilized in a automatic gang bonding machine in the conventional manner.

Description

- - ~05'~9lZ
BACKGROUND OF T~ INVENTION
The present invention relates in general to an im-proved gang bonding interconnect tape for use in bonding ma-chines for automatic gang bonding of semiconductive devices and to a method of making same.

DESCRIPTION OF THE PRIOR ART
Heretofore, gang bonding interconnect tapes, having a series of interconnect patterns formed thereon, have been used in automatic gang bonding machines to bond the individual semiconductive chips to the inner ends of the individual lead patterns and for subsequent bonding of the outer regions of ~; the interconnect lead pattern to a lead frame structure.
, ~, In one prior method of fabricating the gang bonding interconnect tape, a 5 mil thick polyimide tape is coated on one side with a half mil thick layer of adhesive. The coated tape is then punched to provide two rows of outer sprocket holes and then centrally punched to provide a row of personality holes, i.e., the hole in the central region of the interconnect lead pattern to receive the chip or die. The tape is also punched with a ring of apertures in the region of the outer lead bond in each lead pattern to facLlitate shearing of the , interconnect lead pattern at the time of making of the outer i lead bond to the lead frame structure. A 1.3 to 1.4 mil thick copper sheet is hot laminated over the central region of the adhesive coating to provide a laminated tape structure. The copper is coated with a layer of photoresist, and exposed to images through a mask corresponding to each of the individual , ph/ ~
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nterconnect lead ~atterlls, such mask being indexed via the punched sprocket holes. The exposed tape is then developed, and etched to form the interconnect lead patterns in the copper sheet.
The result tape is fed through a first automatic gang bonding machine wherein the inner ends of the individual inter-connect leads are thermal compression gang bonded to gang bond-ing bumps on the semiconductive device. In this first bonding step, the semiconductive device is transferred to the tape.
The tape is then fed through a second automatic bonding machine wherein the individual lead patterns are sheared out of the tape and thermal compression gang bonded at their outer ends to the inner ends of a pattern of leads, such as a lead frame structure, printed circuit board or flexible circuit.
A problem with this first method of fabricating an auto-matic gang bonding interconnect tape is that the interconnect lead paterns are indexed to the punched sprocket holes which are not virgin holes for use in the bonding machine.
In a second method for fabricating an automatic gang bonding interconnect tape, a half mil thick polyimide coating is cast onto one side of a 1.3 to 1.4 mil thick 7" wide master copper tape. Next, the master tape is coated with photoresist on both sides. The master tape is then exposed simultaneously on both sides with different patterns of optical radiation, the copper side being exposed with patterns for parallel rows of individual interconnect leads and parallel rows of sprocket -holes, whereas the polyimide side is exposed with patterns corresponding to parallel rows of personality holes, rows of sprocket holes and rows of rings of perforations in the region ~, ph~

' ' , 105'~9~Z
,_ ~
of the shcar line at the outer lead bond srea of the indivitual lead patterns. Next, the polyimide side is etched to provide the personality holes, the sprocket holes and the outer lead pattern perforations. Next, the copper side is etched to provide the interconnect lead patterns, and the sprocket hole patterns. The resultant master tape is then slit into a plurality of resultant tapes and used in an automatic gang bonding machine in the same manner.as previously described.
A problem with this latter method for fabrication of an automatic gang bonding interconnect tape is that some of the etched sprocket holes are used in the slitting step so that some of the sprocket locator holes for the resultant tapes are not virgin as used in the bonding machine. Also, the patterns formed in the master tape are not indexed to the tape and thus spacing errors in the patterns can accumulate .;,,.
- along the length of the resultant tapes.
Therefore, it is desired to provide an improved "~ method for manufacture of an automatic gang bonding inter-? connect tape which provides virgin sprocket holes for use in ` 20 the gang bonding machine and which has improved indexing of the individual interconnect lead patterns and their respecti~e sprocket holes.
SUMMARY OF THE PRESENT INVE~TION
The principal ob~ect of the present invention is ~' the provision of an improved method for fabrication of a gang bonding interconnect tape.
The invention is used in a method for fabricatlon of a gang bonding interconnect tape for interconnecting a first pattern of leads and a second pattern of leads, such , 30 interconnect tape having a series of metallic interconnect lead mb/~ 4 . . : - - , --' : . - . `.

,.` ' .

~ 05Z9lZ

patterns thereon, lndlvidual one~ of the lead pattern~ lncluding a plurallty of rlbbon-shaped metalllc leads ex~ending outwardly from a central portion of the pattern to an outer region of the pattern and including an electrically insulative support structure interconnecting a plurality of the ribbon-shaped metallic leads in a region of the pattern intermediate the outer region thereof and the central region thereof. The invention relates to the steps of: forming a row of fir~t locator holes along the marginal ~ide edge of an elongated tape;
; 10 forming a row of the metallic interconnect lead patterns in the tape; forming a second row of locator holes in the tape for locating the interconnect patterns in the bondlng machine in which the tape is to be employed for gang bonding to the semiconductive devices; indexing the formation of respective ones of the second row of locator holes to the formation of 1~ ... .
respective ones of the row of interconnect lead patterns; and indexing the formation of both of the second row of locator holes and the row of interconnect lead patterns to the row of ~ ~ first locator holes.
¦ 10 In another feature of the present invention, a ~ ~process of-photoetching i9 employed for the formation of the t ~ ~ rows of interconnect lead patterns and rows of their respective j locator holes. A mask, utiIized for exposing the photoresist ~; coating on the master tape, is indexed to the master tape via -~ 8procket holes in the master tape. The mask serve~ to index respective sets of locator holes to respective ones of the interconnect lead patterns.
~` Other features and advantages of the present invention will become apparent upon a perusal of the following specification mb/ ~ - 5 -~, : ~- .

105'~912 taken in connectlon with the accompanying drawings wherein:
~RIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a plan view of a metallic,tape depicting the parallel rows of electrically insulative support structures deposited thereon, Fig. 2 is an enlarged view of a portion of the structure of Fig. 1 delineated by line 2-2, Fig. 3 is a view similar to that of Fig. 1 depicting the step of exposing the photoresist coated metallic tape to the patterns of radiation corresponding to the individual interconnect lead patterns and locator hole patterns, Fig. 4 is an enlarged detail view of a portion of the structure of Fig. 3 delineated by line 4-4, '~ mb/ - 5a -: - .
''~ ~ `. `.

' ' ' ' '~

---`` 105'~912 Eig. ~ is dn enlarged detail view of a portion of the structure of Fig. 3 delineated by line 5-5, Fig. 6 is a plan view of one of the individual auto-matic gang bonding interconnect }ead tapes after having been separated from the composite tape of Fig. 3, Fig. 7 is an enlarged detail view of a portion of the structure of Fig. 6 delineated by line 7-7, Fig. 8 is an enlarged sectional view of a portion of the interconnect lead structure of Fig. 7 as bonded to a die and to an outer lead frame, Fig. 9 is a sectional view of a semiconductor die bonded to a first interconnect lead pattern which is in turn bonded to a second surrounding interconnect lead pattern of Fig.
10, and Fig. 10 is a schematic plan view of an alternative interconnect tape embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to Figs. 1 and 2, a 1000 foot roll of wrought copper sheet having a wei~ht of one ounce per square foot or a thickness of 1.3 to 1.4 mils is slit into a 70 mil-limeter width to provide a copper tape 11. The copper tape 11 is preferably coated with copper phosphate or other materials, -~
using conventional techniques, to promote adhesion of organic plastic materials to be subsequently applied to the copper tape.
The copper tape is punched along opposite side marginal edges thereof with sprocket holes 12 to be utilized as locating holes.
The holes 12 are spaced at 1.5 inch intervals along the length of tape 11. The copper tape is then annealed and cleaned.
A pattern of electrically insulative support struc-.

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`~ 105~9~2 ~res 13, such as rings, are then screened, as by screening, onto one face of the copper tape 11. In the screening process, the sprocket holes 11 are utilized as locating holes for in-dexing the screening pattern so as to provide proper indexing for the pattern of support structure 13. In a typical example of the screening step of the process, the support structures 13 are screened through a 3" x 3" screen pattern. The support struc-tures 13 are deposited to a thickness of ~etween 0.5 mlls and
2 mils. The electrically insulative screening material 13 should 10 be compatible with bonding temperatures of approximately 400C
for 0.1 second, have a pot life of four hours at 25C, be flex-ible in thicknesses of O.S to 2.0 mils, and have the electrical properties of a good dielectric. Suitable electrically insula-tive support structure materials include thermal setting plastic materials and thermoplastic materials. The thermal setting plastic materials include, cycloalaphatic plastics with anhydride cure, low molecular weight bisphenol with anhydride cure, both cycloalaphatic and low molecular weight disphenol with phenolic *
cure, silicon material such as silanol and vinyl containina sil-20 oxane cured with an SIH siloxane, polyimide, polyamide, mixtures of polyimide andpolyamide, phenolics, and diallylphthalate with peroxide cure. Suitable thermoplastic materials include poly-sulphone, polycarbonate, and ABS. The use of these materials should be compatible with the temperatures encountered in subse-~uent bonding steps. Thus, for thermal compression bonding where temperatures of 450C are encountered the aforecited epoxy and polyimide materials are most suitable.
A suitable epoxy for use in the screening step of the process includes anhydride cured cycloalaphatic epoxy resin 30 which is liquid at room temperature and which has a relatively ~, ph/r7 ~Ji~
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¢, ,~ viscosity at ~5C, that is, a viscosity less than 500 centipose. The cpoxy resin includes a thixotroping agent to carry the viscosity from 500 to over 120,000 centipose and to provide a low yield value. A suitable thixotroping agent includes 7 to 8% by weight of fumed sili~ca treated with silane or silazane so as to convert the silanol groups to trimethyl siloxy groups. This epoxy forms the subject matter of appli-cant's U.S. Patent 4,043,969, issued August 23, 1977.
As an alternative to screening of the electrically insulative support structures 13 onto the copper tape 11 they may be applied by any one of a number of conventional methods such as injection molding, electrostatic spraying through a mask, -or by transfer from a sheet of the material to the copper sheet.
For screening, the thermal setting materials are suit-able when they include a suitable thixotropic agent. For electro-static spraying through a mask, either the thermal setting materials or the thermoplastic materials may be utilized. For injection molding, either the thermal setting or thermoplastic materials may be utilized. For transfer moldin~, the thermal setting materials are suitable.
A number of different formats may be employed depending upon the size of the die which is to be bonded to the inter-connect lead palterns to be formed on the tape. More particu-larly, these support structures 13 are screened onto the tape 11 in a number of parallel rows 14 extending longitudinally of the ' tape 11. The number of parallel rows 14 depends upon the width of the individual tapes which are to be subsequently formed by slitting o~ the master tape 11.
One format corresponds to an individual tape width of 11 millimeters to be utilized with a die size less than 60 x 60 mils,such pattern having a pitch P of 0.1667 inch, where the - ph/c~ - 8 -. .
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~tch is the longi.tudinal spacing between the center of adja-cent support structures 13 of a given row, there being five rows 14 of such support structures 13 in the 70 millimeter width of the master tape 11. In such a case, a 3" length of the composite tape 11 will accommodate 90 support rings 13.
A second format corresponds to an individual tape width of 13.75 millimeters for accommodating die sizes less than 90 x 90 mils, such pattern having a pitch P of 0.214 inch and providing four rows 14 in the 70 millimeter width of the master tape 11 and 5Ç die locations per th,ree inch length of the master tape 11.
A third format correspond to an individual tape ~idth of 16 millimeters to, accom,modate die'si~es less than 200 ~, mils by 200 mils, such pattern having a pitch P of 0.300 inch, there being three rows of such support structures 13 for a 70 millimeter wide master tape 11. This third format provides 30 die locations per three inch length of the master tape'll.
After the support structures 13 have been deposited on the tape 11, the tape'is cured in an oven in an atmosphere.of nitrogen gas so as to harden the individual support structures 13. At this point.the tape 11 may be inventoried if desired.
The method for fabricating a gang bonding interconnect tape em-ploying the deposited support structure 13 forms the subject matter of and is claimed in copending application Serial No.
251,273 filed April 28, 1976 and assigned to the same assignee as the present invention.
Next, the master tape 11 having the support struc-tures 1.3 deposited thereon is cleaned of the adhesion promoting coating and any oxides thereon by appropriate etching and then coated with an antioxidant coating such as chromate to promote ,~ _ g _ ph/~
. . .
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~:' ~: ~ ,', ' ., ~'.. : - '. ' ' ' ' :, .: , - . -' , . .
: ' ' . ' ' ' .: ' '~' : , . ' '. ' ' '.

`-- 105'~912 photoresist adherence. The chromate antioxidant coating is applied to the copper tape 11 by cleaning the copper tape with hydrochloric acid and then immersing the copper tape in a plat-ing solution of chromic acid mixed with sulfuric acid, such mix-ture being 2.0% chromic acid to 8% full strength sulfuric acid to 90~ deionized water by volume. The ~ape is immersed for one minute at room temperature then removed, rinsed in deionized water and dried. In this process, a chromate antioxidant coating is deposited on the copper surface to a thickness of between 10 and 100 angstroms.
Next, the composite tape 11 is coated on both sides with a positive type photoresist coating of conventional type utilized in the semiconductor art. -Next, the side of the tape ll which is opposite tothat containing the support structures 13 is exposed to patterns 15 of optical radiation to which the photoresist material is sensitive. The patterns 15 of radiation are produced by a con-ventional 4" x 4" photo mask as utilized in the semiconductor -art (see Figs. 3-5). The mask 16 hasthereon an array of pat-terns 15 corresponding to the individual interconnect lead patterns to be formed in the copper tape 11. In a typical ex-ample, the mask 16 exposes a three inch length of the tape 11.
In addition to the individual interconnect lead patterns 15, the mask contains patterns 17 corresponding to sprocket holes 17' for each of the tapes which are to be subsequently split from the master tape 11.
Due to a peculiarity of the automatic gang bonding interconnect machines, the sprocket locator holes 17' for a given interconnect pattern 15 must be axially displaced along the tape from the particular lead pattern of interest by ap-., ph/ - ~

.: ~ :, , . : .

--105'~912 proximatel~ 0.5" for the 11 mm, 0.642" for the 13.75 mm and 0.6"
for the 16 mm + ~ 0.0005". Thus, in the case of the 11 mm for-mat the interconnect patterns 15 on the mask at the leading edge thereof have their respective sprocket holes 17 trailing by 0.5"
as shown in Fig. 4. Similarly, at the trailing edge of the mask 16 the pattern for the sprocket holes 17 lags behind the respec-tive interconnect pattern 15 by 0.5". Thus, the individual tape sprocket holes 17 are indexed to the respective lead portions 15 i~-via the mask 16 to a tolerance of + 0.0005".
10On the other hand, the mask 16 is indexed to the tape 11 by means of the sprocket holes 12 at the marginal edge of the master tape 11. These sprocket holes 12 can provide indexing of the mask 16 to the pattern of insulative support structures 13 to + 5 mils. At the overlap of one set of patterns 15 exposed on the tape 11 through the mask 16 to a subsequent set of pat-terns exposed through the mask 16 the overlap tolerance is + 5 mils as provided by the sprocket holes 12. However, the automatic gang bonding machine has the capability of picking up or relé~sin~
the individual tape to compensate for the up to + 30 mil jump in spacing of the sprocket holes 17 at the overlap of two patterns.
Suitable automatic gang bonding interconnect machines are the ILB and OLB Model No. 1-1000 manufactured and marketed by Jade Corporation of Philadelphia, Pennsylvania.
Next, the composite tape 11 is slit into the appropriate number of individual tape strips 21, as shown in Figs. 6 and 7, such slitting occuring inbetween adjacent rows of sprocket holes 17'. The indi~idual gang bonding interconnect tapes ~1 include a series of virgin sprocket holes 17' along opposite marginal side edges thereof and a series of gang bonding inter-connect lead patterns 15 formed therein.

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The individual patterns 15 are personalized to the particular semiconductive die type to which they are to be bonded and each includes an array of ribbon-shaped leads 22 extending outwardly from a central aperture 23 ~personality hole) to an outer region 24 of the copper tape 21. The mar-ginal edge of the personality hole 23 is defined by the inner lip of the electrically insulative support structure 13 (ring) and the ring 13 has sufficient radial extent ot provide suf-ficient support for the individual leads 22 and to hold the leads 22 in the desired circumferentially spaced position in electrically insulative relation. The inner ends of the leads 22 overhang the inner periphery of the personality hole 23 for bonding to gang bonding bumps on the semiconductive die.
An annular gap 25 is defined between the outer peri-phery of the electrically insulative support structure 13 and the inner lip of the frame portion 24. This gap 25 is provided to facilitate shearing of the individual leads 22 at their outer regions at the time that the interconnect lead pattern 15 is thermal compression bonded to the inner lip of the lead frame structure, as more fully described below with regard to Fig. 8. -After the individual tapes 21 have been separatedfrom the composite tape 11 they are inspected and spliced to-gether into long lengths as of 1000 feet. The tape is then uti-lized in the conventional manner with conventional automatic gang bonding interconnect machines such as the aforementioned Jade Model 1-1000. Briefly, in these automatic gang bonding interconnect machines, as shown in Fig. 8, a semiconductive die 27, having a plurality, such as 14, gang bonding bumps 28 formed thereon, is indexed with an individual personality hole 23 by the gang bonding machine.

ph/~ - - 12 -, ~, - : ~: . .

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The aang bonding bumps typically have a height of between 1.0 and 2.0 mils and are connected at their bases to patterns of interconnect metallization on the semiconductive die 27. The inner ends of the leads 22 are thérmal compres-sion bonded to the gang bonding bumps 28 by the gang bonding tool, not shown, which presses the inner ends of the leads 22 down against the upper surface of the gang bonding bumps 2~. In a typical example the gang bonding tool is made of carbon and heated to a temperature of, for example, 550C and presses the inner ends of the interconnect leads down against the gang bonding bumps with a pressure of approximately 8 grams per square mil for a time of approximately 0.2 seconds.
The gang bonding tool gang bonds 14 of such gang bonding bumps to their respective interconnect leads 22 simultaneously.
The die 27 is held to a base support structure via a release wax and due to the heating of the die by the thermal compression tool, the wax releases the die and it is thereby transferred to the tape 21. The tape 21 with the dies 27 at-tached thereto is fed throughla second gang bonding machine which thermal compression bonds the outer portions of the inter-connect leads 22 to the inner ends of a set of lead frame mem-bers 29. For bonding the inner ends of the lead frames 29 to the outer ends of the interconnect leads 22,\the thermal com-pression tool, now shown, is brought up against the lower side of the interconnect leads 22lfor pressing the upper surface of the interconnect leads into engagement with the lower surface of the lead frame structure 29. In a typical example, the temperature of the bonding tool for the outer lead bond is approximately 450C and is held in engagement with the inter-connect leads for approximately 0.15 seconds with a bondinq :

ph/,. - 13 -:: . :. , 105'~glZ
pressure of approximately 25 grams per square mil.
As the thermal compression bond is made between the interconnect lead 22 and the inner ends of the lead frame 29, the copper interconnect lead pattern 15 is sheared along a shear line 31 located just inside the outer ~arginal edge of the interconnect lead pattern 15. In this manner, the lead attached die 27 is transferred from the tape 21 to the lead frame struc-ture 29.
The advantages of the automatic gang bonding inter-connect tape 21 and the method of fabricating same accordingto the present invention include, increased precision in the indexing of the individual interconnect lead patterns and their respective locator sprocket holes 17' in the resultant indivi-dual tapes 21. In addition, the individual tapes 21 have virgin sprocket or locator holes 17' for use in the inner lead gang bonding machine.
- While the preferred embodiment of the present invention utilizes the copper tape having the insulative structures formed thereon, it is equally applicable to the other aforecited prior art tape systems wherein in one system the copper tape portion is laminated onto the polyimide carrier and in the other system the polyimide is cast onto the copper tape.
In an alternative embodiment of the present invention, see Figs. 9 and 10, a 70 mm wide copper tape 41, as of 2.6 mil thickness, is punched with sprocket holes 12 and treated with an adhesion promoting agent, as before described. Patterns of electrically insulative support structures 13', such as rings, are screened or otherwise applied, onto one face of t~e copper tape 41, as before described. The tape 11 is cured and etched, as before described, to define certain interconnect lead ph/,~ tll - 14 -. ' ' ~ !
', ' : '' ' , ` '' . , .

~05;~9~2 -patterns 42 which are to form 1ead patterns for rnaking gang bonding connections to the outer ends of respective ones of the interconnect leads 22, as previously bonded at their inner ends to the dies 27. The interconnect lead patterns 42, thus, take the place of the lead frame 29 of the previous example and the dies 27 are transferred to the flexible lead patterns 42 upon making of the gang bond between the outer ends of the inner interconnect lead patterns 22 and the inner ends of the outer interconnect lead pattern 42. Thus the latter interconneot lead pattern 42 is similar to a flexible printed circuit board and may be punched from the tape 41 along outer shear lines 44 of the pattern for bonding or otherwise belng interconnected to other electrical circuitEy at the outer margin thereof.
In this latter embodiment, additional insulative .
structures, such as a yrid pattern, are deposited at the time of depositing the insulative rings for further strengthening of the lead patterns located outside of the bonding area.

. - 15 -ph/C~o .. . .

- : .
" - !

Claims (9)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. In a method for fabrication of a gang bonding inter-connect tape for interconnecting a first pattern of leads and a second pattern of leads, such interconnect tape having a series of metallic interconnect lead patterns thereon, individual ones of said lead patterns including a plurality of ribbon-shaped metallic leads extending outwardly from a central portion of said pattern to an outer region of said pattern and including an electrically insulative support structure interconnecting a plurality of said ribbon-shaped metallic leads in a region of said pattern intermediate said outer region thereof and said central region thereof, the steps of:
forming a row of first locator holes along the mar-ginal side edge of an elongated tape;
forming a row of said metallic interconnect lead patterns in said tape;
forming a second row of locator holes in said tape for locating said interconnect patterns in the bonding machine in which the tape is to be employed for gang bonding to the semiconductive devices;
indexing said formation of respective ones of said second row of locator holes to said formation of respective ones of said row of interconnect lead patterns; and indexing said formation of both of said second row of locator holes and said row of interconnect lead patterns to said row of first locator holes.
2. The method of Claim 1 wherein the step of indexing said formation of respective ones of said second row of locator holes to said formation of respective ones of said row of inter-connect lead patterns includes, employing a mask for forming said second row of locator holes and said row of interconnect lead patterns on said tape, said mask having a pattern of said second row of locator holes and of said row of interconnect lead patterns formed thereon in indexed relation to each other.
3. The method of Claim 2 wherein the step of indexing said formation of both of said second row of locator holes and said row of interconnect lead patterns to said row of first locator holes includes, the step of indexing said mask to said first row of locator holes in said tape.
4. The method of Claim 3 wherein respective ones of said second row of locator hole patterns in said mask are displaced longitudinally of said row from respective ones of said row of interconnect lead patterns in said mask.
5. The method of Claim 2 wherein the steps of forming the rows of interconnect lead patterns and second locator holes includes the steps of, coating at least one side of said tape with a photoresist coating, exposing said photoresist coating to patterns of optical radiation to which said photoresist coating is sensitive through said mask to form image patterns of said second row of locator holes and of said interconnect lead patterns in said photoresist coating, developing said exposed photoresist coating, removing said photoresist coating in the developed image portions thereof to expose said tape in accordance with the developed images thereon, and etching said tape in the exposed regions thereof to form said second row of locator holes and said row of interconnect lead patterns in said tape.
6. The method of Claim 5 wherein the step of indexing said formation of both of said second row of locator holes and said row of interconnect patterns includes the step of, indexing said mask to said first row of locator holes in said tape.
7. The method of Claim 5 wherein the step of indexing said formation of both of said second row of locator holes and said row of interconnect patterns includes the step of, indexing said mask to said first row of locator holes in said tape, and wherein respective ones of said second row of locator hole patterns in said mask are displaced longitudinally of said row from respective ones of said row of interconnect lead pat-terns in said mask.
8. The method of Claim 7 wherein said mask contains patterns of a plurality of parallel rows of said second locator holes and a plurality of parallel rows of interconnect lead patterns for forming parallel rows of second locator holes and parallel rows of interconnect lead patterns in said tape.
9. The method of Claim 8 including the step of slitting said tape in the region thereof between and parallel to said rows of said second locator holes to slit said tape into a plurality of tapes each having a row of second locator holes and a row of interconnect lead patterns thereon.
CA250,139A 1975-07-07 1976-04-13 Gang bonding interconnect tape for semiconductive devices and method of making same Expired CA1052912A (en)

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BR (1) BR7603581A (en)
CA (1) CA1052912A (en)
DE (1) DE2630269A1 (en)
FR (1) FR2317853A1 (en)
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US4231154A (en) * 1979-01-10 1980-11-04 International Business Machines Corporation Electronic package assembly method
GB2137805B (en) * 1982-11-19 1987-01-28 Stanley Bracey Chip carrier
US4505225A (en) * 1983-08-31 1985-03-19 National Semiconductor Corporation Self-aligning apparatus for semiconductor lead frame processing means
DE3685125D1 (en) * 1985-01-31 1992-06-11 Hitachi Ltd MAGNETIC BUBBLE MEMORY MODULE.
DE3686990T2 (en) * 1985-08-23 1993-04-22 Nippon Electric Co METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT WHILE A FILM CARRIER TAPE IS APPLIED.
GB2205683B (en) * 1987-04-08 1990-08-22 Casio Computer Co Ltd An electronic apparatus and a method for manufacturing the same
KR910004797B1 (en) * 1987-04-08 1991-07-13 가시오 게이상기 가부시기가이샤 Mini-electronic device and its manufacturing method

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US3763404A (en) * 1968-03-01 1973-10-02 Gen Electric Semiconductor devices and manufacture thereof
US3859718A (en) * 1973-01-02 1975-01-14 Texas Instruments Inc Method and apparatus for the assembly of semiconductor devices
DE2414297C3 (en) * 1974-03-25 1980-01-17 Siemens Ag, 1000 Berlin Und 8000 Muenchen Process for the semi-automatic production of intermediate carriers for semiconductor components

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BR7603581A (en) 1977-06-28
JPS5210076A (en) 1977-01-26
FR2317853A1 (en) 1977-02-04
DE2630269A1 (en) 1977-01-27
FR2317853B1 (en) 1982-03-12
GB1522408A (en) 1978-08-23

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