FR2212642B1 - - Google Patents

Info

Publication number
FR2212642B1
FR2212642B1 FR7335188A FR7335188A FR2212642B1 FR 2212642 B1 FR2212642 B1 FR 2212642B1 FR 7335188 A FR7335188 A FR 7335188A FR 7335188 A FR7335188 A FR 7335188A FR 2212642 B1 FR2212642 B1 FR 2212642B1
Authority
FR
France
Prior art keywords
interconnect pattern
film
lead frame
external lead
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7335188A
Other languages
English (en)
French (fr)
Other versions
FR2212642A1 (enExample
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of FR2212642A1 publication Critical patent/FR2212642A1/fr
Application granted granted Critical
Publication of FR2212642B1 publication Critical patent/FR2212642B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0446Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/438Shapes or dispositions of side rails, e.g. having holes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/453Leadframes comprising flexible metallic tapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/464Additional interconnections in combination with leadframes
    • H10W70/468Circuit boards
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/077Connecting of TAB connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07336Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
FR7335188A 1973-01-02 1973-10-02 Expired FR2212642B1 (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US320349A US3859718A (en) 1973-01-02 1973-01-02 Method and apparatus for the assembly of semiconductor devices

Publications (2)

Publication Number Publication Date
FR2212642A1 FR2212642A1 (enExample) 1974-07-26
FR2212642B1 true FR2212642B1 (enExample) 1978-11-10

Family

ID=23246002

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7335188A Expired FR2212642B1 (enExample) 1973-01-02 1973-10-02

Country Status (14)

Country Link
US (1) US3859718A (enExample)
JP (2) JPS5751732B2 (enExample)
KR (1) KR780000595B1 (enExample)
BR (1) BR7309074D0 (enExample)
CA (1) CA1086430A (enExample)
DD (1) DD107812A5 (enExample)
DE (1) DE2363833C2 (enExample)
FR (1) FR2212642B1 (enExample)
GB (1) GB1447524A (enExample)
HU (1) HU167861B (enExample)
IT (1) IT991996B (enExample)
PH (1) PH9927A (enExample)
PL (1) PL87007B1 (enExample)
RO (1) RO64695A (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3949925A (en) * 1974-10-03 1976-04-13 The Jade Corporation Outer lead bonder
CA1052912A (en) * 1975-07-07 1979-04-17 National Semiconductor Corporation Gang bonding interconnect tape for semiconductive devices and method of making same
US4099660A (en) * 1975-10-31 1978-07-11 National Semiconductor Corporation Apparatus for and method of shaping interconnect leads
US4166562A (en) * 1977-09-01 1979-09-04 The Jade Corporation Assembly system for microcomponent devices such as semiconductor devices
US4330790A (en) * 1980-03-24 1982-05-18 National Semiconductor Corporation Tape operated semiconductor device packaging
EP0064496A1 (en) * 1980-11-07 1982-11-17 Mostek Corporation Multiple terminal two conductor layer burn-in tape
US4331831A (en) * 1980-11-28 1982-05-25 Bell Telephone Laboratories, Incorporated Package for semiconductor integrated circuits
US4409733A (en) * 1981-01-26 1983-10-18 Integrated Machine Development Means and method for processing integrated circuit element
JPS5922386A (ja) * 1982-07-07 1984-02-04 アルカテル・エヌ・ブイ 電子部品構造体
US4754912A (en) * 1984-04-05 1988-07-05 National Semiconductor Corporation Controlled collapse thermocompression gang bonding
JPS60229345A (ja) * 1984-04-27 1985-11-14 Toshiba Corp 半導体装置
DE3686990T2 (de) * 1985-08-23 1993-04-22 Nippon Electric Co Verfahren zum herstellen einer halbleiteranordnung wobei ein filmtraegerband angewendet wird.
FR2590052B1 (fr) * 1985-11-08 1991-03-01 Eurotechnique Sa Procede de recyclage d'une carte comportant un composant, carte prevue pour etre recyclee
US5038453A (en) * 1988-07-22 1991-08-13 Rohm Co., Ltd. Method of manufacturing semiconductor devices, and leadframe and differential overlapping apparatus therefor
US4985988A (en) * 1989-11-03 1991-01-22 Motorola, Inc. Method for assembling, testing, and packaging integrated circuits
US5528397A (en) * 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
US6087195A (en) 1998-10-15 2000-07-11 Handy & Harman Method and system for manufacturing lamp tiles
JP5167779B2 (ja) * 2007-11-16 2013-03-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US20160056095A1 (en) * 2014-08-25 2016-02-25 Infineon Technologies Ag Leadframe Strip with Sawing Enhancement Feature

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method
US3442432A (en) * 1967-06-15 1969-05-06 Western Electric Co Bonding a beam-leaded device to a substrate
US3689991A (en) * 1968-03-01 1972-09-12 Gen Electric A method of manufacturing a semiconductor device utilizing a flexible carrier
US3698074A (en) * 1970-06-29 1972-10-17 Motorola Inc Contact bonding and packaging of integrated circuits
US3698073A (en) * 1970-10-13 1972-10-17 Motorola Inc Contact bonding and packaging of integrated circuits
US3793714A (en) * 1971-05-27 1974-02-26 Texas Instruments Inc Integrated circuit assembly using etched metal patterns of flexible insulating film

Also Published As

Publication number Publication date
GB1447524A (en) 1976-08-25
HU167861B (enExample) 1975-12-25
CA1086430A (en) 1980-09-23
DE2363833A1 (de) 1974-07-04
RO64695A (ro) 1980-06-15
PH9927A (en) 1976-06-14
DE2363833C2 (de) 1987-01-22
BR7309074D0 (pt) 1974-10-22
FR2212642A1 (enExample) 1974-07-26
JPS57164556A (en) 1982-10-09
US3859718A (en) 1975-01-14
IT991996B (it) 1975-08-30
JPS5751732B2 (enExample) 1982-11-04
PL87007B1 (enExample) 1976-06-30
JPS4999477A (enExample) 1974-09-19
DD107812A5 (enExample) 1974-08-12
KR780000595B1 (en) 1978-11-23

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