JPH117387A5 - - Google Patents

Info

Publication number
JPH117387A5
JPH117387A5 JP1997159048A JP15904897A JPH117387A5 JP H117387 A5 JPH117387 A5 JP H117387A5 JP 1997159048 A JP1997159048 A JP 1997159048A JP 15904897 A JP15904897 A JP 15904897A JP H117387 A5 JPH117387 A5 JP H117387A5
Authority
JP
Japan
Prior art keywords
decoding
opcode
operation field
field
vliw processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1997159048A
Other languages
English (en)
Japanese (ja)
Other versions
JP3790607B2 (ja
JPH117387A (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from JP15904897A external-priority patent/JP3790607B2/ja
Priority to JP15904897A priority Critical patent/JP3790607B2/ja
Priority to US09/096,715 priority patent/US6085306A/en
Priority to EP09172123A priority patent/EP2138933A1/en
Priority to IL12490498A priority patent/IL124904A/en
Priority to DE69838966T priority patent/DE69838966T2/de
Priority to EP06076804.1A priority patent/EP1734440B1/en
Priority to TW087109487A priority patent/TW490636B/zh
Priority to EP98304690A priority patent/EP0886210B1/en
Priority to EP09172121A priority patent/EP2138932B1/en
Priority to MYPI98002693A priority patent/MY116751A/en
Priority to MYPI20032352A priority patent/MY135426A/en
Priority to SG200203000A priority patent/SG111062A1/en
Priority to CNB981029868A priority patent/CN1178145C/zh
Priority to SG200202999A priority patent/SG111061A1/en
Priority to KR1019980022512A priority patent/KR100534967B1/ko
Priority to CNB200410006873XA priority patent/CN100339824C/zh
Priority to SG9801438A priority patent/SG91248A1/en
Publication of JPH117387A publication Critical patent/JPH117387A/ja
Priority to US09/598,397 priority patent/US6397319B1/en
Priority to IL14743102A priority patent/IL147431A0/xx
Priority to US10/097,759 priority patent/US7533243B2/en
Priority to US10/155,672 priority patent/US6834336B2/en
Publication of JPH117387A5 publication Critical patent/JPH117387A5/ja
Publication of JP3790607B2 publication Critical patent/JP3790607B2/ja
Application granted granted Critical
Priority to US12/418,965 priority patent/US8019971B2/en
Priority to US12/705,300 priority patent/US8250340B2/en
Priority to US13/543,437 priority patent/US20120272044A1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

JP15904897A 1997-06-16 1997-06-16 Vliwプロセッサ Expired - Lifetime JP3790607B2 (ja)

Priority Applications (24)

Application Number Priority Date Filing Date Title
JP15904897A JP3790607B2 (ja) 1997-06-16 1997-06-16 Vliwプロセッサ
US09/096,715 US6085306A (en) 1997-06-16 1998-06-12 Processor for executing highly efficient VLIW
EP09172123A EP2138933A1 (en) 1997-06-16 1998-06-15 Processor for executing highly efficient VLIW instructions
IL12490498A IL124904A (en) 1997-06-16 1998-06-15 Processor for executing highly efficient vliw
DE69838966T DE69838966T2 (de) 1997-06-16 1998-06-15 Prozessor zur Ausführung von hochwirksamen VLIW-Befehlen
EP06076804.1A EP1734440B1 (en) 1997-06-16 1998-06-15 Processor for executing highly efficient VLIW instructions
TW087109487A TW490636B (en) 1997-06-16 1998-06-15 Processor for executing highly efficient VLIW
EP98304690A EP0886210B1 (en) 1997-06-16 1998-06-15 Processor for executing highly efficient VLIW instructions
EP09172121A EP2138932B1 (en) 1997-06-16 1998-06-15 Processor for executing highly efficient VLIW instructions
SG200202999A SG111061A1 (en) 1997-06-16 1998-06-16 Processor for executing highly efficient vliw
SG9801438A SG91248A1 (en) 1997-06-16 1998-06-16 Processor for executing highly efficient vlim
MYPI20032352A MY135426A (en) 1997-06-16 1998-06-16 Processor for executing highly efficient vliw
SG200203000A SG111062A1 (en) 1997-06-16 1998-06-16 Processor for executing highly efficient vliw
CNB981029868A CN1178145C (zh) 1997-06-16 1998-06-16 高效执行特长指令字的处理器
MYPI98002693A MY116751A (en) 1997-06-16 1998-06-16 Processor for executing highly efficient vliw
KR1019980022512A KR100534967B1 (ko) 1997-06-16 1998-06-16 코드효율이높은초장명령어를실행하는프로세서
CNB200410006873XA CN100339824C (zh) 1997-06-16 1998-06-16 高效执行特长指令字的处理器和方法
US09/598,397 US6397319B1 (en) 1997-06-16 2000-06-20 Process for executing highly efficient VLIW
IL14743102A IL147431A0 (en) 1997-06-16 2002-01-01 Recording medium recording a vliw instruction
US10/097,759 US7533243B2 (en) 1997-06-16 2002-05-22 Processor for executing highly efficient VLIW
US10/155,672 US6834336B2 (en) 1997-06-16 2002-05-24 Processor for executing highly efficient VLIW
US12/418,965 US8019971B2 (en) 1997-06-16 2009-04-06 Processor for executing highly efficient VLIW
US12/705,300 US8250340B2 (en) 1997-06-16 2010-02-12 Processor for executing highly efficient VLIW
US13/543,437 US20120272044A1 (en) 1997-06-16 2012-07-06 Processor for executing highly efficient vliw

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15904897A JP3790607B2 (ja) 1997-06-16 1997-06-16 Vliwプロセッサ

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2003284355A Division JP2004005733A (ja) 2003-07-31 2003-07-31 Vliwプロセッサ

Publications (3)

Publication Number Publication Date
JPH117387A JPH117387A (ja) 1999-01-12
JPH117387A5 true JPH117387A5 (enExample) 2004-08-19
JP3790607B2 JP3790607B2 (ja) 2006-06-28

Family

ID=15685098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15904897A Expired - Lifetime JP3790607B2 (ja) 1997-06-16 1997-06-16 Vliwプロセッサ

Country Status (10)

Country Link
US (7) US6085306A (enExample)
EP (4) EP2138932B1 (enExample)
JP (1) JP3790607B2 (enExample)
KR (1) KR100534967B1 (enExample)
CN (2) CN100339824C (enExample)
DE (1) DE69838966T2 (enExample)
IL (1) IL124904A (enExample)
MY (2) MY116751A (enExample)
SG (3) SG91248A1 (enExample)
TW (1) TW490636B (enExample)

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3790607B2 (ja) * 1997-06-16 2006-06-28 松下電器産業株式会社 Vliwプロセッサ
JP3412462B2 (ja) * 1997-07-30 2003-06-03 松下電器産業株式会社 プロセッサ
US6219776B1 (en) * 1998-03-10 2001-04-17 Billions Of Operations Per Second Merged array controller and processing element
EP0953898A3 (en) * 1998-04-28 2003-03-26 Matsushita Electric Industrial Co., Ltd. A processor for executing Instructions from memory according to a program counter, and a compiler, an assembler, a linker and a debugger for such a processor
JP2001034471A (ja) 1999-07-19 2001-02-09 Mitsubishi Electric Corp Vliw方式プロセッサ
JP4234925B2 (ja) * 1999-08-30 2009-03-04 アイピーフレックス株式会社 データ処理装置、制御方法およびその記録媒体
JP3730455B2 (ja) * 1999-10-01 2006-01-05 富士通株式会社 情報処理装置及び情報処理方法
US20020004897A1 (en) * 2000-07-05 2002-01-10 Min-Cheng Kao Data processing apparatus for executing multiple instruction sets
US20030023830A1 (en) * 2001-07-25 2003-01-30 Hogenauer Eugene B. Method and system for encoding instructions for a VLIW that reduces instruction memory requirements
JP2005535045A (ja) * 2002-08-05 2005-11-17 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Vliw命令を処理するためのプロセッサおよび方法
WO2004017197A2 (en) * 2002-08-16 2004-02-26 Koninklijke Philips Electronics N.V. Apparatus, method, and compiler enabling processing of variable length instructions in a very long instruction word processor
EP1546869B1 (en) 2002-09-24 2013-04-03 Silicon Hive B.V. Apparatus, method, and compiler enabling processing of load immediate isntructions in a very long instruction word processor
WO2004034253A2 (en) * 2002-10-11 2004-04-22 Koninklijke Philips Electronics N.V. Vliw processor with variable, address range dependent issue-width
US8211338B2 (en) 2003-07-01 2012-07-03 Transitions Optical, Inc Photochromic compounds
JP4283131B2 (ja) * 2004-02-12 2009-06-24 パナソニック株式会社 プロセッサ及びコンパイル方法
US8736628B1 (en) 2004-05-14 2014-05-27 Nvidia Corporation Single thread graphics processing system and method
US8736620B2 (en) * 2004-05-14 2014-05-27 Nvidia Corporation Kill bit graphics processing system and method
US8743142B1 (en) 2004-05-14 2014-06-03 Nvidia Corporation Unified data fetch graphics processing system and method
US8860722B2 (en) * 2004-05-14 2014-10-14 Nvidia Corporation Early Z scoreboard tracking system and method
US8687010B1 (en) 2004-05-14 2014-04-01 Nvidia Corporation Arbitrary size texture palettes for use in graphics systems
US7146491B2 (en) * 2004-10-26 2006-12-05 Arm Limited Apparatus and method for generating constant values
KR100636596B1 (ko) 2004-11-25 2006-10-23 한국전자통신연구원 고에너지 효율 병렬 처리 데이터 패스 구조
US7523295B2 (en) * 2005-03-21 2009-04-21 Qualcomm Incorporated Processor and method of grouping and executing dependent instructions in a packet
US7849466B2 (en) * 2005-07-12 2010-12-07 Qualcomm Incorporated Controlling execution mode of program threads by applying a mask to a control register in a multi-threaded processor
JP4916151B2 (ja) * 2005-09-29 2012-04-11 ルネサスエレクトロニクス株式会社 並列演算装置
EP2028590A4 (en) * 2006-06-15 2009-07-08 Nec Corp PROCESSOR AND COMMAND CONTROL PROCEDURE
US8537168B1 (en) 2006-11-02 2013-09-17 Nvidia Corporation Method and system for deferred coverage mask generation in a raster stage
US20090046105A1 (en) * 2007-08-15 2009-02-19 Bergland Tyson J Conditional execute bit in a graphics processor unit pipeline
US8521800B1 (en) 2007-08-15 2013-08-27 Nvidia Corporation Interconnected arithmetic logic units
US8736624B1 (en) 2007-08-15 2014-05-27 Nvidia Corporation Conditional execution flag in graphics applications
US9183607B1 (en) 2007-08-15 2015-11-10 Nvidia Corporation Scoreboard cache coherence in a graphics pipeline
US8599208B2 (en) * 2007-08-15 2013-12-03 Nvidia Corporation Shared readable and writeable global values in a graphics processor unit pipeline
US8775777B2 (en) * 2007-08-15 2014-07-08 Nvidia Corporation Techniques for sourcing immediate values from a VLIW
US8314803B2 (en) 2007-08-15 2012-11-20 Nvidia Corporation Buffering deserialized pixel data in a graphics processor unit pipeline
US7870339B2 (en) 2008-01-11 2011-01-11 International Business Machines Corporation Extract cache attribute facility and instruction therefore
US7895419B2 (en) 2008-01-11 2011-02-22 International Business Machines Corporation Rotate then operate on selected bits facility and instructions therefore
US7734900B2 (en) 2008-01-11 2010-06-08 International Business Machines Corporation Computer configuration virtual topology discovery and instruction therefore
US7739434B2 (en) 2008-01-11 2010-06-15 International Business Machines Corporation Performing a configuration virtual topology change and instruction therefore
US9280480B2 (en) 2008-01-11 2016-03-08 International Business Machines Corporation Extract target cache attribute facility and instruction therefor
US20100004542A1 (en) 2008-07-03 2010-01-07 Texas Instruments Incorporated System and method for ultrasound color doppler imaging
US8418268B2 (en) * 2009-12-04 2013-04-16 Global Trademarks, Llc Garment having support
US9678754B2 (en) 2010-03-03 2017-06-13 Qualcomm Incorporated System and method of processing hierarchical very long instruction packets
US8228109B2 (en) 2010-06-28 2012-07-24 Freescale Semiconductor, Inc. Transmission gate circuitry for high voltage terminal
US8804764B2 (en) 2010-12-21 2014-08-12 International Business Machines Corporation Data path for data extraction from streaming data
US20120198213A1 (en) * 2011-01-31 2012-08-02 International Business Machines Corporation Packet handler including plurality of parallel action machines
JP5813484B2 (ja) * 2011-11-30 2015-11-17 ルネサスエレクトロニクス株式会社 Vliwプロセッサと命令構造と命令実行方法
US9411595B2 (en) 2012-05-31 2016-08-09 Nvidia Corporation Multi-threaded transactional memory coherence
US9824009B2 (en) 2012-12-21 2017-11-21 Nvidia Corporation Information coherency maintenance systems and methods
US10102142B2 (en) 2012-12-26 2018-10-16 Nvidia Corporation Virtual address based memory reordering
US9317251B2 (en) 2012-12-31 2016-04-19 Nvidia Corporation Efficient correction of normalizer shift amount errors in fused multiply add operations
US9483266B2 (en) 2013-03-15 2016-11-01 Intel Corporation Fusible instructions and logic to provide OR-test and AND-test functionality using multiple test sources
US9886277B2 (en) 2013-03-15 2018-02-06 Intel Corporation Methods and apparatus for fusing instructions to provide OR-test and AND-test functionality on multiple test sources
US9569385B2 (en) 2013-09-09 2017-02-14 Nvidia Corporation Memory transaction ordering
EP3193645B1 (en) * 2014-10-23 2020-01-01 Talon Technologies Inc. Method of forming a pocket bag for a garment and garment comprising a pocket bag
CN106160717B (zh) 2015-04-03 2020-08-18 恩智浦美国有限公司 传输门电路
TWI707272B (zh) * 2019-04-10 2020-10-11 瑞昱半導體股份有限公司 可執行指令的電子裝置以及指令執行方法

Family Cites Families (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4295193A (en) * 1979-06-29 1981-10-13 International Business Machines Corporation Machine for multiple instruction execution
US5050070A (en) * 1988-02-29 1991-09-17 Convex Computer Corporation Multi-processor computer system having self-allocating processors
US5202967A (en) * 1988-08-09 1993-04-13 Matsushita Electric Industrial Co., Ltd. Data processing apparatus for performing parallel decoding and parallel execution of a variable word length instruction
US5000000A (en) * 1988-08-31 1991-03-19 University Of Florida Ethanol production by Escherichia coli strains co-expressing Zymomonas PDC and ADH genes
US5615349A (en) 1990-09-04 1997-03-25 Mitsubishi Denki Kabushiki Kaisha Data processing system capable of execution of plural instructions in parallel
JP2835103B2 (ja) * 1989-11-01 1998-12-14 富士通株式会社 命令指定方法及び命令実行方式
DE4040382C2 (de) * 1989-12-15 1999-03-11 Hitachi Ltd Integrierte Halbleiterschaltungsanordnung mit niederer Leistungsaufnahme und Verfahren zu ihrem Betrieb
JPH04143819A (ja) * 1989-12-15 1992-05-18 Hitachi Ltd 消費電力制御方法、半導体集積回路装置およびマイクロプロセツサ
US5333280A (en) * 1990-04-06 1994-07-26 Nec Corporation Parallel pipelined instruction processing system for very long instruction word
DE69130723T2 (de) * 1990-10-05 1999-07-22 Koninklijke Philips Electronics N.V., Eindhoven Verarbeitungsgerät mit Speicherschaltung und eine Gruppe von Funktionseinheiten
JP2908598B2 (ja) * 1991-06-06 1999-06-21 松下電器産業株式会社 情報処理装置
JP3186095B2 (ja) 1991-07-05 2001-07-11 日本電気株式会社 演算処理装置
JPH0527970A (ja) * 1991-07-18 1993-02-05 Seikosha Co Ltd 演算装置
JP2848727B2 (ja) 1991-11-18 1999-01-20 株式会社東芝 並列演算処理装置
EP0551090B1 (en) * 1992-01-06 1999-08-04 Hitachi, Ltd. Computer having a parallel operating capability
JPH05233281A (ja) * 1992-02-21 1993-09-10 Toshiba Corp 電子計算機
US5371864A (en) * 1992-04-09 1994-12-06 International Business Machines Corporation Apparatus for concurrent multiple instruction decode in variable length instruction set computer
US5617549A (en) * 1992-10-06 1997-04-01 Hewlett-Packard Co System and method for selecting and buffering even and odd instructions for simultaneous execution in a computer
US6002880A (en) * 1992-12-29 1999-12-14 Philips Electronics North America Corporation VLIW processor with less instruction issue slots than functional units
US5485629A (en) * 1993-01-22 1996-01-16 Intel Corporation Method and apparatus for executing control flow instructions in a control flow pipeline in parallel with arithmetic instructions being executed in arithmetic pipelines
US5384722A (en) * 1993-03-10 1995-01-24 Intel Corporation Apparatus and method for determining the Manhattan distance between two points
JP2636136B2 (ja) 1993-04-27 1997-07-30 工業技術院長 演算処理装置及び演算処理方法
EP1102166B1 (en) 1993-11-05 2003-05-21 Intergraph Corporation Software scheduled superscalar computer architecture
JP3199205B2 (ja) * 1993-11-19 2001-08-13 株式会社日立製作所 並列演算装置
GB9412435D0 (en) * 1994-06-21 1994-08-10 Inmos Ltd Computer instruction addressing
US6334219B1 (en) * 1994-09-26 2001-12-25 Adc Telecommunications Inc. Channel selection for a hybrid fiber coax network
ZA9510127B (en) * 1994-12-01 1996-06-06 Intel Corp Novel processor having shift operations
US6401190B1 (en) * 1995-03-17 2002-06-04 Hitachi, Ltd. Parallel computing units having special registers storing large bit widths
US5669001A (en) * 1995-03-23 1997-09-16 International Business Machines Corporation Object code compatible representation of very long instruction word programs
US5774726A (en) * 1995-04-24 1998-06-30 Sun Microsystems, Inc. System for controlled generation of assembly language instructions using assembly language data types including instruction types in a computer language as input to compiler
JP2931890B2 (ja) * 1995-07-12 1999-08-09 三菱電機株式会社 データ処理装置
US5848288A (en) 1995-09-20 1998-12-08 Intel Corporation Method and apparatus for accommodating different issue width implementations of VLIW architectures
US5774737A (en) * 1995-10-13 1998-06-30 Matsushita Electric Industrial Co., Ltd. Variable word length very long instruction word instruction processor with word length register or instruction number register
US5884323A (en) * 1995-10-13 1999-03-16 3Com Corporation Extendible method and apparatus for synchronizing files on two different computer systems
US5822606A (en) * 1996-01-11 1998-10-13 Morton; Steven G. DSP having a plurality of like processors controlled in parallel by an instruction word, and a control processor also controlled by the instruction word
US5787302A (en) * 1996-05-15 1998-07-28 Philips Electronic North America Corporation Software for producing instructions in a compressed format for a VLIW processor
US5826054A (en) 1996-05-15 1998-10-20 Philips Electronics North America Corporation Compressed Instruction format for use in a VLIW processor
US5852741A (en) 1996-05-15 1998-12-22 Philips Electronics North America Corporation VLIW processor which processes compressed instruction format
US5748936A (en) * 1996-05-30 1998-05-05 Hewlett-Packard Company Method and system for supporting speculative execution using a speculative look-aside table
JP3442225B2 (ja) * 1996-07-11 2003-09-02 株式会社日立製作所 演算処理装置
JP3745039B2 (ja) * 1996-08-01 2006-02-15 株式会社ルネサステクノロジ 遅延命令を有するマイクロプロセッサ
JPH10232779A (ja) 1997-01-24 1998-09-02 Texas Instr Inc <Ti> 命令並列処理方法及び装置
US5805850A (en) * 1997-01-30 1998-09-08 International Business Machines Corporation Very long instruction word (VLIW) computer having efficient instruction code format
JP3578883B2 (ja) * 1997-01-31 2004-10-20 三菱電機株式会社 データ処理装置
US5881307A (en) * 1997-02-24 1999-03-09 Samsung Electronics Co., Ltd. Deferred store data read with simple anti-dependency pipeline inter-lock control in superscalar processor
JP3147021B2 (ja) 1997-02-26 2001-03-19 松下電器産業株式会社 積層型フィルムコンデンサ用積層フィルムのスリット方法
JP3790607B2 (ja) * 1997-06-16 2006-06-28 松下電器産業株式会社 Vliwプロセッサ
US6219779B1 (en) * 1997-06-16 2001-04-17 Matsushita Electric Industrial Co., Ltd. Constant reconstructing processor which supports reductions in code size
US6256709B1 (en) * 1997-06-26 2001-07-03 Sun Microsystems, Inc. Method for storing data in two-way set associative odd and even banks of a cache memory
JP3412462B2 (ja) * 1997-07-30 2003-06-03 松下電器産業株式会社 プロセッサ
JP3414209B2 (ja) * 1997-07-30 2003-06-09 松下電器産業株式会社 プロセッサ
JP3892118B2 (ja) * 1997-07-31 2007-03-14 高砂香料工業株式会社 2,2’−ビス(ジアリールホスフィノ)−6,6’−ビス(トリフルオロメチル)−1,1’−ビフェニル、これを配位子とする遷移金属錯体および光学活性な3−ヒドロキシ酪酸エステル誘導体あるいはβ−ブチロラクトンの製造方法
US6170051B1 (en) * 1997-08-01 2001-01-02 Micron Technology, Inc. Apparatus and method for program level parallelism in a VLIW processor
US5922065A (en) * 1997-10-13 1999-07-13 Institute For The Development Of Emerging Architectures, L.L.C. Processor utilizing a template field for encoding instruction sequences in a wide-word format
US6173389B1 (en) * 1997-12-04 2001-01-09 Billions Of Operations Per Second, Inc. Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
US6076154A (en) * 1998-01-16 2000-06-13 U.S. Philips Corporation VLIW processor has different functional units operating on commands of different widths
US5881260A (en) * 1998-02-09 1999-03-09 Hewlett-Packard Company Method and apparatus for sequencing and decoding variable length instructions with an instruction boundary marker within each instruction
US6446190B1 (en) * 1998-03-12 2002-09-03 Bops, Inc. Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor
JP3541669B2 (ja) 1998-03-30 2004-07-14 松下電器産業株式会社 演算処理装置
US6275927B2 (en) * 1998-09-21 2001-08-14 Advanced Micro Devices. Compressing variable-length instruction prefix bytes
US6058306A (en) * 1998-11-02 2000-05-02 Hughes Electronics Corporation Compensation of dynamic doppler frequency of large range in satellite communication systems
US6314509B1 (en) * 1998-12-03 2001-11-06 Sun Microsystems, Inc. Efficient method for fetching instructions having a non-power of two size
JP3841967B2 (ja) * 1999-01-19 2006-11-08 株式会社ルネサステクノロジ マイクロプロセッサ
AU2509700A (en) * 1999-01-25 2000-08-07 E.I. Du Pont De Nemours And Company Polysaccharide fibers
US6116806A (en) * 1999-02-17 2000-09-12 Chang; Chin Pao Connection tightness and swing angle adjustable pivot
US6405301B1 (en) * 1999-06-15 2002-06-11 U.S. Philips Corporation Parallel data processing
US6415376B1 (en) * 2000-06-16 2002-07-02 Conexant Sytems, Inc. Apparatus and method for issue grouping of instructions in a VLIW processor
JP4502532B2 (ja) * 2001-02-23 2010-07-14 株式会社ルネサステクノロジ データ処理装置

Similar Documents

Publication Publication Date Title
JPH117387A5 (enExample)
JP3790607B2 (ja) Vliwプロセッサ
JP3541669B2 (ja) 演算処理装置
KR100327776B1 (ko) 다중 명령세트를 사용하는 데이터 처리방법
KR100327778B1 (ko) 다중명령 세트를 이용한 데이터 프로세싱 방법
US7664934B2 (en) Data processor decoding instruction formats using operand data
US6173389B1 (en) Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
KR100831472B1 (ko) 데이터 셔플링을 위한 방법 및 장치
KR101812569B1 (ko) 다중 명령 세트에 의해 사용되는 레지스터 간의 매핑
US6002881A (en) Coprocessor data access control
US6044448A (en) Processor having multiple datapath instances
RU96118510A (ru) Отображение с помощью мультинаборов команд
WO2012136975A1 (en) A data processing apparatus and method for performing vector operations
JP2005332361A (ja) プログラム命令圧縮装置および方法
CN108139911B (zh) 在vliw处理器的同一执行包中使用有条件扩展槽的指令的有条件执行规格
US11847427B2 (en) Load store circuit with dedicated single or dual bit shift circuit and opcodes for low power accelerator processor
EP3482289A1 (en) Vector register access
JPH03233630A (ja) 情報処理装置
WO2003052591A3 (en) Processor architecture selectively using finite-state-machine for control code
JPS6217773B2 (enExample)
EP1113356B1 (en) Method and apparatus for reducing the size of code in a processor with an exposed pipeline
JP3670801B2 (ja) プロセッサ
JP3019818B2 (ja) データ処理方法
JPH11249895A (ja) プログラム命令実行装置及びプログラム命令実行方法
WO2007041047A2 (en) Computer processor architecture comprising operand stack and addressable registers