JPH07153769A - 半導体集積回路装置の製造方法および製造装置 - Google Patents

半導体集積回路装置の製造方法および製造装置

Info

Publication number
JPH07153769A
JPH07153769A JP5300397A JP30039793A JPH07153769A JP H07153769 A JPH07153769 A JP H07153769A JP 5300397 A JP5300397 A JP 5300397A JP 30039793 A JP30039793 A JP 30039793A JP H07153769 A JPH07153769 A JP H07153769A
Authority
JP
Japan
Prior art keywords
hydrogen
semiconductor wafer
manufacturing
integrated circuit
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5300397A
Other languages
English (en)
Japanese (ja)
Inventor
Hiromitsu Enami
弘充 榎並
Kiyomi Yagi
清美 八木
Masanori Katsuyama
雅則 勝山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5300397A priority Critical patent/JPH07153769A/ja
Priority to TW083110586A priority patent/TW269738B/zh
Priority to KR1019940031084A priority patent/KR950015652A/ko
Priority to US08/348,108 priority patent/US5543336A/en
Priority to CN94119855A priority patent/CN1107254A/zh
Publication of JPH07153769A publication Critical patent/JPH07153769A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67213—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one ion or electron beam chamber

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
JP5300397A 1993-11-30 1993-11-30 半導体集積回路装置の製造方法および製造装置 Pending JPH07153769A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP5300397A JPH07153769A (ja) 1993-11-30 1993-11-30 半導体集積回路装置の製造方法および製造装置
TW083110586A TW269738B (enExample) 1993-11-30 1994-11-15
KR1019940031084A KR950015652A (ko) 1993-11-30 1994-11-24 반도체 집적회로장치의 제조방법 및 제조장치
US08/348,108 US5543336A (en) 1993-11-30 1994-11-25 Removing damage caused by plasma etching and high energy implantation using hydrogen
CN94119855A CN1107254A (zh) 1993-11-30 1994-11-29 制造半导体集成电路的方法和设备

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5300397A JPH07153769A (ja) 1993-11-30 1993-11-30 半導体集積回路装置の製造方法および製造装置

Publications (1)

Publication Number Publication Date
JPH07153769A true JPH07153769A (ja) 1995-06-16

Family

ID=17884301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5300397A Pending JPH07153769A (ja) 1993-11-30 1993-11-30 半導体集積回路装置の製造方法および製造装置

Country Status (5)

Country Link
US (1) US5543336A (enExample)
JP (1) JPH07153769A (enExample)
KR (1) KR950015652A (enExample)
CN (1) CN1107254A (enExample)
TW (1) TW269738B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5976919A (en) * 1994-06-10 1999-11-02 Matsushita Electric Industrial Co., Ltd. Apparatus and method of manufacturing semiconductor element
JP2978746B2 (ja) * 1995-10-31 1999-11-15 日本電気株式会社 半導体装置の製造方法
US6489219B1 (en) * 1995-11-09 2002-12-03 Micron Technology, Inc. Method of alloying a semiconductor device
JP3865145B2 (ja) * 1996-01-26 2007-01-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6222228B1 (en) * 1997-06-19 2001-04-24 Texas Instruments Incorporated Method for reducing gate oxide damage caused by charging
JP3998765B2 (ja) * 1997-09-04 2007-10-31 シャープ株式会社 多結晶半導体層の製造方法及び半導体装置の評価方法
US6165375A (en) * 1997-09-23 2000-12-26 Cypress Semiconductor Corporation Plasma etching method
JP4174862B2 (ja) * 1998-08-04 2008-11-05 ソニー株式会社 薄膜トランジスタの製造方法および半導体装置の製造方法
AU2002367179A1 (en) * 2001-12-26 2003-07-15 Tokyo Electron Limited Substrate treating method and production method for semiconductor device
US6667243B1 (en) * 2002-08-16 2003-12-23 Advanced Micro Devices, Inc. Etch damage repair with thermal annealing
US9449831B2 (en) 2007-05-25 2016-09-20 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US20090179253A1 (en) 2007-05-25 2009-07-16 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US8940645B2 (en) 2007-05-25 2015-01-27 Cypress Semiconductor Corporation Radical oxidation process for fabricating a nonvolatile charge trap memory device
US8633537B2 (en) 2007-05-25 2014-01-21 Cypress Semiconductor Corporation Memory transistor with multiple charge storing layers and a high work function gate electrode
US7659184B2 (en) * 2008-02-25 2010-02-09 Applied Materials, Inc. Plasma immersion ion implantation process with chamber seasoning and seasoning layer plasma discharging for wafer dechucking
US20130023097A1 (en) * 2011-07-14 2013-01-24 Purtell Robert J U-mos trench profile optimization and etch damage removal using microwaves
WO2013148343A1 (en) * 2012-03-31 2013-10-03 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
CN107346729A (zh) * 2016-05-04 2017-11-14 北大方正集团有限公司 半导体器件的基底及其制作方法和半导体器件
JP6547925B1 (ja) * 2017-09-29 2019-07-24 株式会社村田製作所 圧電基板の製造装置及び圧電基板の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3849204A (en) * 1973-06-29 1974-11-19 Ibm Process for the elimination of interface states in mios structures
JPS5352532A (en) * 1976-10-25 1978-05-13 Yoshizawa Sekkai Kogyo Kk Method of manufacturing raw materials for portland cement clinker
FR2461359A1 (fr) * 1979-07-06 1981-01-30 Commissariat Energie Atomique Procede et appareil d'hydrogenation de dispositifs a semi-conducteurs
JPS57118635A (en) * 1981-01-16 1982-07-23 Matsushita Electronics Corp Manufacture of semiconductor device
JPS58137218A (ja) * 1982-02-09 1983-08-15 Nec Corp シリコン単結晶基板の処理方法
JPS59143318A (ja) * 1983-02-03 1984-08-16 Seiko Epson Corp 光アニ−ル法
JPS6135525A (ja) * 1984-07-27 1986-02-20 Seiko Epson Corp 半導体装置の製造方法
JPH0770524B2 (ja) * 1987-08-19 1995-07-31 富士通株式会社 半導体装置の製造方法
EP0419693A1 (de) * 1989-09-25 1991-04-03 Siemens Aktiengesellschaft Verfahren zur Passivierung von Kristalldefekten in poly-kristallinem Silizium-Material
JP2668459B2 (ja) * 1991-03-14 1997-10-27 株式会社半導体エネルギー研究所 絶縁膜作製方法

Also Published As

Publication number Publication date
KR950015652A (ko) 1995-06-17
US5543336A (en) 1996-08-06
CN1107254A (zh) 1995-08-23
TW269738B (enExample) 1996-02-01

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