CN1107254A - 制造半导体集成电路的方法和设备 - Google Patents

制造半导体集成电路的方法和设备 Download PDF

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Publication number
CN1107254A
CN1107254A CN94119855A CN94119855A CN1107254A CN 1107254 A CN1107254 A CN 1107254A CN 94119855 A CN94119855 A CN 94119855A CN 94119855 A CN94119855 A CN 94119855A CN 1107254 A CN1107254 A CN 1107254A
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CN
China
Prior art keywords
hydrogen
semiconductor wafer
chamber
manufacturing
integrated circuit
Prior art date
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Pending
Application number
CN94119855A
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English (en)
Chinese (zh)
Inventor
榎并弘充
胜山清美
胜山雅则
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Hitachi Ltd
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Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of CN1107254A publication Critical patent/CN1107254A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67213—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one ion or electron beam chamber

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
CN94119855A 1993-11-30 1994-11-29 制造半导体集成电路的方法和设备 Pending CN1107254A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP300397/93 1993-11-30
JP5300397A JPH07153769A (ja) 1993-11-30 1993-11-30 半導体集積回路装置の製造方法および製造装置

Publications (1)

Publication Number Publication Date
CN1107254A true CN1107254A (zh) 1995-08-23

Family

ID=17884301

Family Applications (1)

Application Number Title Priority Date Filing Date
CN94119855A Pending CN1107254A (zh) 1993-11-30 1994-11-29 制造半导体集成电路的方法和设备

Country Status (5)

Country Link
US (1) US5543336A (enExample)
JP (1) JPH07153769A (enExample)
KR (1) KR950015652A (enExample)
CN (1) CN1107254A (enExample)
TW (1) TW269738B (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1076877C (zh) * 1995-10-31 2001-12-26 日本电气株式会社 不残留氢的非单晶薄膜晶体管的半导体器件的制造方法
CN104321878A (zh) * 2012-03-31 2015-01-28 赛普拉斯半导体公司 具有多个氮氧化物层的氧化物氮化物氧化物堆栈
US20150187960A1 (en) 2007-05-25 2015-07-02 Cypress Semiconductor Corporation Radical Oxidation Process For Fabricating A Nonvolatile Charge Trap Memory Device
CN107346729A (zh) * 2016-05-04 2017-11-14 北大方正集团有限公司 半导体器件的基底及其制作方法和半导体器件
US9929240B2 (en) 2007-05-25 2018-03-27 Cypress Semiconductor Corporation Memory transistor with multiple charge storing layers and a high work function gate electrode
US10374067B2 (en) 2007-05-25 2019-08-06 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers
US10903068B2 (en) 2007-05-25 2021-01-26 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5976919A (en) * 1994-06-10 1999-11-02 Matsushita Electric Industrial Co., Ltd. Apparatus and method of manufacturing semiconductor element
US6489219B1 (en) * 1995-11-09 2002-12-03 Micron Technology, Inc. Method of alloying a semiconductor device
JP3865145B2 (ja) * 1996-01-26 2007-01-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6222228B1 (en) * 1997-06-19 2001-04-24 Texas Instruments Incorporated Method for reducing gate oxide damage caused by charging
JP3998765B2 (ja) * 1997-09-04 2007-10-31 シャープ株式会社 多結晶半導体層の製造方法及び半導体装置の評価方法
US6165375A (en) * 1997-09-23 2000-12-26 Cypress Semiconductor Corporation Plasma etching method
JP4174862B2 (ja) * 1998-08-04 2008-11-05 ソニー株式会社 薄膜トランジスタの製造方法および半導体装置の製造方法
AU2002367179A1 (en) * 2001-12-26 2003-07-15 Tokyo Electron Limited Substrate treating method and production method for semiconductor device
US6667243B1 (en) * 2002-08-16 2003-12-23 Advanced Micro Devices, Inc. Etch damage repair with thermal annealing
US7659184B2 (en) * 2008-02-25 2010-02-09 Applied Materials, Inc. Plasma immersion ion implantation process with chamber seasoning and seasoning layer plasma discharging for wafer dechucking
US20130023097A1 (en) * 2011-07-14 2013-01-24 Purtell Robert J U-mos trench profile optimization and etch damage removal using microwaves
JP6547925B1 (ja) * 2017-09-29 2019-07-24 株式会社村田製作所 圧電基板の製造装置及び圧電基板の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3849204A (en) * 1973-06-29 1974-11-19 Ibm Process for the elimination of interface states in mios structures
JPS5352532A (en) * 1976-10-25 1978-05-13 Yoshizawa Sekkai Kogyo Kk Method of manufacturing raw materials for portland cement clinker
FR2461359A1 (fr) * 1979-07-06 1981-01-30 Commissariat Energie Atomique Procede et appareil d'hydrogenation de dispositifs a semi-conducteurs
JPS57118635A (en) * 1981-01-16 1982-07-23 Matsushita Electronics Corp Manufacture of semiconductor device
JPS58137218A (ja) * 1982-02-09 1983-08-15 Nec Corp シリコン単結晶基板の処理方法
JPS59143318A (ja) * 1983-02-03 1984-08-16 Seiko Epson Corp 光アニ−ル法
JPS6135525A (ja) * 1984-07-27 1986-02-20 Seiko Epson Corp 半導体装置の製造方法
JPH0770524B2 (ja) * 1987-08-19 1995-07-31 富士通株式会社 半導体装置の製造方法
EP0419693A1 (de) * 1989-09-25 1991-04-03 Siemens Aktiengesellschaft Verfahren zur Passivierung von Kristalldefekten in poly-kristallinem Silizium-Material
JP2668459B2 (ja) * 1991-03-14 1997-10-27 株式会社半導体エネルギー研究所 絶縁膜作製方法

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1076877C (zh) * 1995-10-31 2001-12-26 日本电气株式会社 不残留氢的非单晶薄膜晶体管的半导体器件的制造方法
US10896973B2 (en) 2007-05-25 2021-01-19 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers
US10903342B2 (en) 2007-05-25 2021-01-26 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers
US12266521B2 (en) 2007-05-25 2025-04-01 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers
US12009401B2 (en) 2007-05-25 2024-06-11 Longitude Flash Memory Solutions Ltd. Memory transistor with multiple charge storing layers and a high work function gate electrode
US10304968B2 (en) 2007-05-25 2019-05-28 Cypress Semiconductor Corporation Radical oxidation process for fabricating a nonvolatile charge trap memory device
US10312336B2 (en) 2007-05-25 2019-06-04 Cypress Semiconductor Corporation Memory transistor with multiple charge storing layers and a high work function gate electrode
US10374067B2 (en) 2007-05-25 2019-08-06 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers
US10446656B2 (en) 2007-05-25 2019-10-15 Longitude Flash Memory Solutions Ltd. Memory transistor with multiple charge storing layers and a high work function gate electrode
US20150187960A1 (en) 2007-05-25 2015-07-02 Cypress Semiconductor Corporation Radical Oxidation Process For Fabricating A Nonvolatile Charge Trap Memory Device
US10593812B2 (en) 2007-05-25 2020-03-17 Longitude Flash Memory Solutions Ltd. Radical oxidation process for fabricating a nonvolatile charge trap memory device
US9929240B2 (en) 2007-05-25 2018-03-27 Cypress Semiconductor Corporation Memory transistor with multiple charge storing layers and a high work function gate electrode
US10903068B2 (en) 2007-05-25 2021-01-26 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers
US11056565B2 (en) 2007-05-25 2021-07-06 Longitude Flash Memory Solutions Ltd. Flash memory device and method
US11222965B2 (en) 2007-05-25 2022-01-11 Longitude Flash Memory Solutions Ltd Oxide-nitride-oxide stack having multiple oxynitride layers
US11456365B2 (en) 2007-05-25 2022-09-27 Longitude Flash Memory Solutions Ltd. Memory transistor with multiple charge storing layers and a high work function gate electrode
US11721733B2 (en) 2007-05-25 2023-08-08 Longitude Flash Memory Solutions Ltd. Memory transistor with multiple charge storing layers and a high work function gate electrode
US11784243B2 (en) 2007-05-25 2023-10-10 Longitude Flash Memory Solutions Ltd Oxide-nitride-oxide stack having multiple oxynitride layers
CN104321878A (zh) * 2012-03-31 2015-01-28 赛普拉斯半导体公司 具有多个氮氧化物层的氧化物氮化物氧化物堆栈
CN107346729A (zh) * 2016-05-04 2017-11-14 北大方正集团有限公司 半导体器件的基底及其制作方法和半导体器件

Also Published As

Publication number Publication date
KR950015652A (ko) 1995-06-17
JPH07153769A (ja) 1995-06-16
US5543336A (en) 1996-08-06
TW269738B (enExample) 1996-02-01

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