JPH0590327A - 半導体集積回路 - Google Patents

半導体集積回路

Info

Publication number
JPH0590327A
JPH0590327A JP3248684A JP24868491A JPH0590327A JP H0590327 A JPH0590327 A JP H0590327A JP 3248684 A JP3248684 A JP 3248684A JP 24868491 A JP24868491 A JP 24868491A JP H0590327 A JPH0590327 A JP H0590327A
Authority
JP
Japan
Prior art keywords
bonding
bonding wire
bonding pad
semiconductor integrated
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3248684A
Other languages
English (en)
Inventor
Akitoshi Kato
秋敏 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP3248684A priority Critical patent/JPH0590327A/ja
Publication of JPH0590327A publication Critical patent/JPH0590327A/ja
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05073Single internal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • H01L2224/05557Shape in side view comprising protrusions or indentations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4807Shape of bonding interfaces, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4845Details of ball bonds
    • H01L2224/48451Shape
    • H01L2224/48453Shape of the interface with the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】 【目的】ボンディング・パッドとボンディング・ワイヤ
ーが密着する面積を大きくする。 【構成】シリコン基板1上のシリコン酸化膜2を介し
て、断面形状が凹状のボンディング・パッド4を形成す
る。

Description

【発明の詳細な説明】
【0001】
【産業上の利用分野】本発明は半導体集積回路に関し、
特にボンディング・パッドの形状に関する。
【0002】
【従来の技術】従来、半導体集積回路のボンディング・
パッドは、図2に示す様に、半導体基板1上に絶縁膜2
を形成し、その上に均一な厚みの金属でボンディング・
パッド4Aを形成し、次にボンディング・ワイヤー5と
密着する部分を除いてパッシベーション膜3で覆った構
造となっていた。
【0003】
【発明が解決しようとする課題】近年のダイナミック・
ランダム・アクセス・メモリーの大容量化に伴ない半導
体集積回路の素子加工寸法が微細化している。そのた
め、ボンディング・パッドの寸法が小さくなり、ボンデ
ィング・ワイヤーは細くなるので、ボンディング・パッ
ドとボンディング・ワイヤーが密着する面積が小さくな
ってきている。このため水分がボンディング・パッドの
表面に入り、ボンディングパッドを腐食させるため、ボ
ンディング・ワイヤーがはがれ接続不良を起こすという
欠点があった。
【0004】本発明の目的は、上記のような問題点を解
消した半導体集積回路を提供することにある。
【0005】
【課題を解決するための手段】本発明の半導体集積回路
は、半導体基板上に形成された複数のボンディング・パ
ッドを有する半導体集積回路において、前記ボンディン
グ・パッドは断面が凹状に形成されているものである。
【0006】
【実施例】次に、本発明の実施例について図面を参照し
て説明する。図1は本発明の一実施例の断面図である。
【0007】図1において、シリコン基板1上にはシリ
コン酸化膜2を介してアルミ等からなる凹状のボンディ
ング・パッド4が形成されている。そして、ボンディン
グ・パッド4とボンディング・ワイヤー5とが密着する
部分を除いて窒化膜等からなるパッシベーション膜3が
形成されている。
【0008】このように構成された本実施例によれば、
ボンディング・パッド4の断面形状が凹状となっている
ため、ボンディング・ワイヤー5との接触面積が大きく
なる。従って水分によりボンディング・パッド4に腐食
が生じても、ボンディング・ワイヤー5のはがれは抑制
される。
【0009】
【発明の効果】以上説明したように本発明は、ボンディ
ング・パッドの断面形状を凹状に形成することにより、
ボンディング・ワイヤーと密着する面積が大となるた
め、水分がボンディング・ワイヤーの底面まで入りにく
くなる。このためボンディング・ワイヤーのはがれが抑
制されるという効果がある。
【図面の簡単な説明】
【図1】本発明の一実施例の断面図。
【図2】従来の半導体集積回路の一例の断面図。
【符号の説明】
1 シリコン基板 2 シリコン酸化膜 3 パッシベーション膜 4,4A ボンディング・パッド 5 ボンディング・ワイヤー

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】 半導体基板上に形成された複数のボンデ
    ィング・パッドを有する半導体集積回路において、前記
    ボンディング・パッドは断面が凹状に形成されているこ
    とを特徴とする半導体集積回路。
JP3248684A 1991-09-27 1991-09-27 半導体集積回路 Pending JPH0590327A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3248684A JPH0590327A (ja) 1991-09-27 1991-09-27 半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3248684A JPH0590327A (ja) 1991-09-27 1991-09-27 半導体集積回路

Publications (1)

Publication Number Publication Date
JPH0590327A true JPH0590327A (ja) 1993-04-09

Family

ID=17181798

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3248684A Pending JPH0590327A (ja) 1991-09-27 1991-09-27 半導体集積回路

Country Status (1)

Country Link
JP (1) JPH0590327A (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100604556B1 (ko) * 2004-10-13 2006-07-28 동부일렉트로닉스 주식회사 반도체 소자의 본딩패드 형성 방법
US7754597B2 (en) 2005-07-27 2010-07-13 Seiko Epson Corporation Bonding pad fabrication method, method for fabricating a bonding pad and an electronic device, and electronic device
JP2016025107A (ja) * 2014-07-16 2016-02-08 ルネサスエレクトロニクス株式会社 半導体装置、および半導体装置の製造方法
CN108346618A (zh) * 2017-01-25 2018-07-31 中芯国际集成电路制造(上海)有限公司 半导体器件及其制作方法、电子装置
CN108447794A (zh) * 2017-01-24 2018-08-24 丰田自动车株式会社 半导体装置及其制造方法
CN113161319A (zh) * 2021-04-23 2021-07-23 长鑫存储技术有限公司 半导体结构及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5728344A (en) * 1980-07-29 1982-02-16 Nec Corp Semiconductor device
JPS6484724A (en) * 1987-09-28 1989-03-30 Nec Corp Semiconductor device
JPH03278551A (ja) * 1990-03-28 1991-12-10 Nec Corp 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5728344A (en) * 1980-07-29 1982-02-16 Nec Corp Semiconductor device
JPS6484724A (en) * 1987-09-28 1989-03-30 Nec Corp Semiconductor device
JPH03278551A (ja) * 1990-03-28 1991-12-10 Nec Corp 半導体装置

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100604556B1 (ko) * 2004-10-13 2006-07-28 동부일렉트로닉스 주식회사 반도체 소자의 본딩패드 형성 방법
US7754597B2 (en) 2005-07-27 2010-07-13 Seiko Epson Corporation Bonding pad fabrication method, method for fabricating a bonding pad and an electronic device, and electronic device
JP2016025107A (ja) * 2014-07-16 2016-02-08 ルネサスエレクトロニクス株式会社 半導体装置、および半導体装置の製造方法
CN108447794A (zh) * 2017-01-24 2018-08-24 丰田自动车株式会社 半导体装置及其制造方法
CN108346618A (zh) * 2017-01-25 2018-07-31 中芯国际集成电路制造(上海)有限公司 半导体器件及其制作方法、电子装置
CN108346618B (zh) * 2017-01-25 2021-09-21 中芯国际集成电路制造(上海)有限公司 半导体器件及其制作方法、电子装置
CN113161319A (zh) * 2021-04-23 2021-07-23 长鑫存储技术有限公司 半导体结构及其制作方法
CN113161319B (zh) * 2021-04-23 2022-03-22 长鑫存储技术有限公司 半导体结构及其制作方法

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