JPH0580831B2 - - Google Patents

Info

Publication number
JPH0580831B2
JPH0580831B2 JP58105711A JP10571183A JPH0580831B2 JP H0580831 B2 JPH0580831 B2 JP H0580831B2 JP 58105711 A JP58105711 A JP 58105711A JP 10571183 A JP10571183 A JP 10571183A JP H0580831 B2 JPH0580831 B2 JP H0580831B2
Authority
JP
Japan
Prior art keywords
wiring
wirings
lines
line
coupling capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58105711A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59231852A (ja
Inventor
Katsutaka Kimura
Ryoichi Hori
Kyoo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58105711A priority Critical patent/JPS59231852A/ja
Publication of JPS59231852A publication Critical patent/JPS59231852A/ja
Publication of JPH0580831B2 publication Critical patent/JPH0580831B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP58105711A 1983-06-15 1983-06-15 半導体装置 Granted JPS59231852A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58105711A JPS59231852A (ja) 1983-06-15 1983-06-15 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58105711A JPS59231852A (ja) 1983-06-15 1983-06-15 半導体装置

Publications (2)

Publication Number Publication Date
JPS59231852A JPS59231852A (ja) 1984-12-26
JPH0580831B2 true JPH0580831B2 (enrdf_load_stackoverflow) 1993-11-10

Family

ID=14414919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58105711A Granted JPS59231852A (ja) 1983-06-15 1983-06-15 半導体装置

Country Status (1)

Country Link
JP (1) JPS59231852A (enrdf_load_stackoverflow)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60254635A (ja) * 1984-05-30 1985-12-16 Fujitsu Ltd 集積回路装置
JPS61230359A (ja) * 1985-04-05 1986-10-14 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JPH0682802B2 (ja) * 1985-05-23 1994-10-19 三菱電機株式会社 半導体メモリ装置
JPH07118518B2 (ja) * 1985-10-04 1995-12-18 日本電気株式会社 半導体メモリ
CA1305255C (en) * 1986-08-25 1992-07-14 Joseph Lebowitz Marching interconnecting lines in semiconductor integrated circuits
JPH07109878B2 (ja) * 1988-11-16 1995-11-22 株式会社東芝 半導体記憶装置
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
JP3112021B2 (ja) * 1990-07-09 2000-11-27 株式会社日立製作所 半導体メモリ
JP2008227171A (ja) * 2007-03-13 2008-09-25 Toshiba Corp 不揮発性半導体メモリ
JP2009302425A (ja) * 2008-06-17 2009-12-24 Sanyo Electric Co Ltd 半導体記憶装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5354986A (en) * 1976-10-29 1978-05-18 Toshiba Corp Multilayer wiring circuit
JPS5784149A (en) * 1980-11-14 1982-05-26 Hitachi Ltd Semiconductor integrated circuit device
JPS57198592A (en) * 1981-05-29 1982-12-06 Hitachi Ltd Semiconductor memory device

Also Published As

Publication number Publication date
JPS59231852A (ja) 1984-12-26

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